Mhz HC4046 VCO timing cap issues

[anotherjim]

This is a not directly audio question, but I know that some engineers with the experience read this forum, so...

So I have the 74HC4046 chip for it's VCO and it needs to generate a CPU clock that I can set by twiddling the control volts between around 6Mhz to 20Mhz. It does this, however, there is a peculiar glitch around 8Mhz. At that point the output on pin4 judders. On the scope, below 8Meg it looks like a slewed square as I pretty much expected, then it judders and above 8.1meg looks more like a noisy sine wave.  If I have an FM radio on in the room, at the point it judders, the radio programme gets squelched out. I can't see any problem with the chips 5v supply and there's a 100nF mlcc bypass cap right across its power pins.
I'm thinking it's down to the timing cap/connections acting like an inductor and resonating at 8Mhz.
Would using an SMD timing cap help? It seems they can have much lower self-inductance.
I built it on perfboard but the 4046 is socketed, would it do better without the socket?
The cap needs to be in the 100pF-220pF range and so far, 150pF seems best. I've tried ceramic disc and polybox from my stash, but don't have any SMD.
And the secondary question for UK builders is -  where can I get smd caps from without having to order industrial quantities?

[Kipper4]

Can't help you Jim, It's above my pay grade.
However I love the signature.

Carry on..........

[Rob Strand]

I only have feeble offerings:

I'd probably try:
- Cut the cap leads short then connect with some fat leads to the bypass cap and maybe try
  10nF or 10nF in parallel with 100nF. 
- Try different loads on the outputs like resistors and small caps to see what has an effect.
- Connect the CRO probe via a 100R or 1K resistors in case the CRO loading is doing something.
- Try to connect CRO close as possible.  Maybe using the trick with the short bit of wire curled around the ground connection near the CRO tip.


One project I had to get a 74HC4046 running with the loop locking at 2 to 3MHz.   The Nat semi chips struggled to lock.  The Philips chips just made it.  IIRC the Harris chips were also fast but I doubt you will find one of those.  (I vaguely remember having to allow for some time delay in the control loop but that shouldn't affect a VCO only design.)

There could be something weird  going on with the control signal.  Can you bypass that near the chip?

[ElectricDruid]

I've also played with the 74HC4046 as a high frequency VCO. In my case I needed it as the master oscillator for a top octave generator, but it was the same idea of using it as a CV-controlled processor clock.

I didn't get the issue you're seeing, but I had a nightmare trying to tune the thing. The 4046 VCO is intended to be part of a PLL control loop, so it looks to me like they *really* didn't consider stability at all. After all, it'll lock to the input, right?
I found that I needed to separately tune about three trimmers to get it stable at the frequency I wanted, and that it wasn't reliable over time or temperature. And if you changed to different chip, the required values would be completely different. And if you changed to a different *manufacturer's* chip, the required values would so far different you'd probably need different trimmer values! ARGGGH!!

Sorry, I realise none of this helps, except to say I feel for you since I've been there myself.

Tom

[anotherjim]

Well, ok, thanks for the replies...

That's wot I got at the moment.
The data says the HC4046 timing resistors shouldn't go below 3k, so the R1 is 3k3.
Funnily enough, Tom, it is a TOG in the 328. The mcu doesn't seem to care about the hiccup at 8Mhz, the prog don't crash.
About 8Mhz is what it would need to run as a 1Mhz TOG chip. Funny how that's the spot that jerks around! Can just about tune it for concert pitch, but couldn't introduce vibrato with that issue.

[Rob Strand]

That's wot I got at the moment.

On paper it looks fine.

I'm thinking maybe the micro load is upsetting the VCO *somehow*.  One idea is to use the PC1 xor gate as a buffer (or inverter):  Feed the micro from the PC1 output (pin 2), VCOOUT (pin 4) -> COMP_IN (pin 3), then SIGIN (pin 14) to either ground or Vcc.

As far as trying to understand the problem you could try a different C7, R3, R5 and see the problem frequency moves, maybe you can move it outside of the problem region.   In that process you might see the real problem.

[ElectricDruid]

Funnily enough, Tom, it is a TOG in the 328. The mcu doesn't seem to care about the hiccup at 8Mhz, the prog don't crash.
About 8Mhz is what it would need to run as a 1Mhz TOG chip. Funny how that's the spot that jerks around! Can just about tune it for concert pitch, but couldn't introduce vibrato with that issue.

Hohoho  . That's just what I was trying, except I was on a PIC. I wanted a 8MHz centre, with an octave of modulation up or down, so 4MHz to 16MHz range. I got it, but not reliably enough. Not for all manufacturers, incidentally - some of the chips I looked at give a top end of 10MHz, which is how I finished up with my final three candidates (NXP and Texas were two, I forget the third), and then I bought three chips from each to play with. Every single one was different. It was awful. The whole project got back-burnered as a result. Unless I can produce something that people can build with the components listed in the BOM and actually expect it to work, there's no point, and for this thing it felt like I was having to rearrange half the components for each different chip.

My schematic was completely different though - based on Thomas Henry's 4046 VCO, but simplified since I only needed a two octave range:

https://electricdruid.net/wp-content/uploads/2019/01/NoteDiv-Pg1.jpg

Thomas Henry's original circuit is described here:

https://www.birthofasynth.com/Thomas_Henry/Pages/X-4046.html

The full page about my attempt is here:

https://electricdruid.net/adventures-in-top-octave-generation/

The main advantage of this for me was the addition of exponential control. Although I only wanted a two octave range, and I only wanted it for modulation and vibrato, I'd like it to stay musical-ish if possible, so "roughly exponential" was what I was aiming for.

On the plus side, this circuit seemed to be well-behaved in terms of the frequency output. I never saw any of the sort of jittering effects you're describing. It was just that every chip includes a random constant and random slope value that you then have to compensate for externally....

HTH,
Tom

[anotherjim]

Truth to tell I was getting similar behaviour on protoboard, but up in the Mhz, was not surprised what with the extra stray capacitance and wire inductance that brings. That often goes away when its transferred to a pcb. As I said, the fact that it upsets an FM radio (that's about 12' away) makes me suspect there's some LC resonance thing going on. Could it be there's some extremely devious gremlin living in my workshop? 

Rob, I did try the phase comp output but the wave was not any different - maybe a little less symmetry probably because of the extra paths in the xor gate. That made me think that buffering up the pin4 output wasn't going to change anything. I tried different C & R values but the need to constrain the CV range meant the values have to be similar to what I finished with.

Not sure what brand of HC4046 it is -  either Texas or ST I think. I've heard that the HC7046 may be better, the only uk source I see for that is via mouser uk.

I could go away from the 8Mhz area by changing the program dividers so it acts like a 1Mhz TOG with a 16Mhz cpu clock. Might even read an input pin state to choose between the two TOG octave ranges. It would only set on boot since the code has no time to change it on the fly.

In the end, it might have been better to use the pll as a multiplier working off a lower frequency master oscillator. That way you could select octave range on the fly and with the pll loop behaviour, get a polyphonic glide when you do.

[Rob Strand]

It's a very puzzling problem.

Truth to tell I was getting similar behaviour on protoboard, but up in the Mhz, was not surprised what with the extra stray capacitance and wire inductance that brings. That often goes away when its transferred to a pcb. As I said, the fact that it upsets an FM radio (that's about 12' away) makes me suspect there's some LC resonance thing going on. Could it be there's some extremely devious gremlin living in my workshop? 

All of those would go through my mind as well.    I would be very tempted to change the chip at this point with a strong motivation for another brand.

Rob, I did try the phase comp output but the wave was not any different - maybe a little less symmetry probably because of the extra paths in the xor gate. That made me think that buffering up the pin4 output wasn't going to change anything. I tried different C & R values but the need to constrain the CV range meant the values have to be similar to what I finished with.

When things don't make sense you can only try these things.

One thing that is really weird is you are just using the VCO and the VCO is certainly working within its operating range.

I don't know why but I scanned over NXP datasheet is they say R1 in parallel with R2 should be greater than 2.7k.    Your R1 & R2 work out at 2.2k.   So at least that's something.

I know changing R1 and R2  might go against your requirements.   Like you could put a divider on the input of the control pin.  On the other hand scaling up the resistors and scaling down the cap might be worth trying.   There's not much option on the cap 100pF or 120pF since C > 100pF.  Maybe worth trying.

[anotherjim]

Ahh... all those different datasheets for these things...
Ok, the chip is from TI, and they have an applications note. According to which, the combined R1+R2 current must not exceed 1mA or VCO control linearity will suffer. The timing cap minimum isn't really around 100p, it's just that stray capacitance becomes a significant factor below 100p. It will oscillate on the stray if the timing cap isn't there.
BTW, the notes also mention the HC7046 only differs in having a loop lock detector output instead of PC3. So the VCO shouldn't be any better.

As it happens, I'm going to rescale the VCO for an 8Mhz top. My idea to do it in the ATmega code is thwarted by the discovery that a required hardware timer doesn't have a 1/16 or 1/32 clock prescaler setting - it goes from 1/8 (currently used) to 1/64 - Why Atmel?

[Rob Strand]

all those different datasheets for these things...

It brings back memories because I ploughed through those for the 2/3Mhz project that wouldn't lock.

Ok, the chip is from TI, and they have an applications note.

Can't remember if the TI's were slow or fast.  TI have bought-up Nat-Semi and Harris who both made 74HC4046's.

According to which, the combined R1+R2 current must not exceed 1mA or VCO control linearity will suffer. The timing cap minimum isn't really around 100p, it's just that stray capacitance becomes a significant factor below 100p. It will oscillate on the stray if the timing cap isn't there.

OK, got it.   I noticed at high frequencies the C1 values in the tables are quite small.    I also noticed how there isn't a great deal of detailed about high frequencies when R2 is present or when the VCO covers the full range of voltages.

After pondering over the datasheets a bit and I didn't come-up with much.   The only thing which might be useful is the 8MHz occurs when the VCO is at around 1.2V or so.    There may be an issue at high frequencies at the low VCO voltage end.   Some of the VCOin graphs show the VCO voltage just above 1V.

So if that is the problem maybe you can narrow your VCOin range to be 1.3V to 4.3V and it might fix the problem.  You could use a voltage divider to +V to shift the VCOin voltage up a tad.  After that tweak R1 R2 to get the VCO range over the smaller voltage span.

The fact it goes a bit nuts at 8MHz and interferes with the FM radio probably means it is misbehaving.   At first I was thinking datasheet caveats but maybe not.   The Low VCOin voltage + high freq. might be tipping over the edge.

BTW, the notes also mention the HC7046 only differs in having a loop lock detector output instead of PC3. So the VCO shouldn't be any better.

Yes, I have a vague memory of that.   You never know about the VCO.

As it happens, I'm going to rescale the VCO for an 8Mhz top. My idea to do it in the ATmega code is thwarted by the discovery that a required hardware timer doesn't have a 1/16 or 1/32 clock prescaler setting - it goes from 1/8 (currently used) to 1/64 - Why Atmel?

What about a different chip in the series?  Sometime you get chips which for some reason are different from the other in the series.  I've seen that on a few projects and on various brands of micro.   They are all the same but slightly different  .

[Rob Strand]

I found this old Philips note,
https://ozindfw.net/TimeNuttery/Mendes_Daniel/PLL%20Design%20Guide.pdf

p9 and p14 indicate the control voltage should be > 1.1V.
It does mention because of linearity.

[ElectricDruid]

Ok, the chip is from TI, and they have an applications note.

Can't remember if the TI's were slow or fast.  TI have bought-up Nat-Semi and Harris who both made 74HC4046's.

I think TI were fast. TI is one of the ones I've got, and I selected for fast ones.

T.

[Rob Strand]

I think TI were fast. TI is one of the ones I've got, and I selected for fast ones.

T.

Thanks.   

[anotherjim]

Well, although it works, the jitter of the HC4046 VCO is just too much for my liking, even at the 4Mhz which is now likely to be the application. I thought it was my scope/probes/setup but I lashed up a few xtal oscillators and they are stable.
Even in the Khz ranges, I can see jitter in the HC4046 and I've tried all the routing/decoupling cures I can think of.
My theory explaining the problem is the way the timing cap has to be slam discharged before it reverses direction. When the positively charged end gets switched to ground, the opposite end goes negative and rapidly discharges via substrate diodes. At the same time, it ought to start charging positive. This rocks the boat just as everything else needs to switch and as it's in the chip, there's no way around it.
One thing you can do is to fit separate caps to ground from pins 6 & 7. This does improve jitter somewhat, but they must be closely matched or you lose 50% duty cycle. This is how to get other than 50% should you wish and I must try that next time I play with a 4046 pitch follower circuit.
Separate Vdd and Vss pins for the VCO core might have been a good idea. Which I see is what they did in the old TTL VCO chips. A difference in the HC7046 is that pin1 is a separate ground for the phase comp section. I wonder why?

Of interest is the 74LS628. I'd assumed those were obsolete by now, but no, Texas still have them active even in PDIP. Mouser have stock. I've yet to try one. Datasheet shows a typical 1v to 5v control range of 1.6Mhz to 20Mhz with a 50pF timing cap.

In other news, I breadboarded an old organ master oscillator design that uses a dual one-shot chip. A 74LS221. Originally intended for 1Mhz, this is surprisingly good at 4Mhz with smaller caps. Not entirely jitter free but better than the 4046. Of course, the tuning range is small, but it might serve as a stand-in until something better arrives.
There is a good schematic here...
https://www.narcisivalter.it/progetti/tos_m087-b1.html