Messing about with the CD4046 VCO and other stuff.

[anotherjim]

Yep, TH developed the x4046 with Nat-Semi chips. Scott Stites found Motorola were as good.
I have one ancient Nat-Semi and it performs similar to the Philips ones.

The timing resistor ranges are (all app notes I can find) 10k to 1M.
I find the minimum can go much lower, but the linearity of the high-frequency adjustment goes crazy if you do.
Over 1M is where they really get wobbly. Bear in mind if you use pin9 CV control the pin11 resistor is in series with the control Nmos. It's better to avoid that as x4046 does but I found it makes little difference if the pin11 or pin12 resistor currents are used for control instead.
To get a full synth VCO range, the x4046 control transistor's effective resistance must have to go well north of 1M to get down to bass frequencies while still being able to reach the highs.

[PRR]

> To get a full synth VCO range, the x4046

Walt Jung's Don Lancaster's remarks in The CMOS Cookbook:

[parmalee]

> To get a full synth VCO range, the x4046

Walt Jung's remarks in The CMOS Cookbook:

Don Lancaster, rather.

This thread is awesome.  Apart from a couple of brief sections on the VCO and the PLL in the 4046 from the CMOS Cookbook and a Ray Marston article or two, there doesn't seem to be an abundance of material on the 4046.  And most music/sound related projects--from the EMM harmony generator to that Mini-synth project (from ), and especially the Schumann PLL (and it's innumerable offshoots)--seem to be based upon a lot of guesswork.

Compounded by the immense variations between chips from different manufacturers, I suppose calculating appropriate values is somewhat a crapshoot anyways, but these posts are greatly appreciated nonetheless.

[Rob Strand]

This thread is awesome. 

I didn't get to read over the details of the thread until some time after thread started but I liked some of  anotherjim's tricks.

Compounded by the immense variations between chips from different manufacturers, I suppose calculating appropriate values is somewhat a crapshoot anyways, but these posts are greatly appreciated nonetheless.

Try to find the TI document,

SCHA003B
CMOS Phase-Locked-Loop Applications Using the
CD54/74HC/HCT4046A and CD54/74HC/HCT7046A

It goes through a lot of the chip innards.  It's good for getting an idea of what's going.   

However, (IIRC) when I went through all the details (voltages and secondary effects like dependence on supply voltage), the calculations  didn't match the datasheet or measurements   The TI app note is for the D54/74HC/HCT4046A but I seemed to remember it didn't match that datasheet either.

I also tried tweaking some of the thresholds and circuit parameters to align with the CMOS version and it didn't match up with the CMOS CD4046 datasheet.

The difference was like a factor of two, like something was missing in the TI app note description.   I could have stuffed up.  However I did check it a number of times but couldn't see how it was out by such a large factor.   In the end I packed it up for a rainy day.

[anotherjim]

Further to the claim I made earlier that CV pin9 can stop the VCO below if 1v, I've noticed that the currently supplied TI CD4046 VCO does in fact tickover very slowly -  probably due to leakage paths.

I think I've seen SCHA003B. I see the 54/74 series parts have equal phase comparator input circuits (pin3 & 14). Previously the CD part only Signal input pin14 has a biased input for AC coupling. As a PLL, the loop filter can be an opamp integrator instead of the basic RC network, but this inverts polarity and makes the loop adjust in the wrong direction. The solution is to apply the input signal to pin3 and the loop filter output to pin14. This should work better now both PC inputs have the same characteristics. That said, I've not seen any advantage to using an op-amp integrator myself but haven't experimented much with that.