Single stage Mu-Amp - debugging (very loud)

[Woolly Mother Mammoth]

I breadboarded RG's Mu-amp (J201) from Geofex. The article says that it is no gain monster what so ever but mine is on the contrary just that, it's loud and overdrives the signal quite a bit but not gating or anything like that. Just bordering on a smooth fuzz.


When I simulate the circuit in LTSpice I only get massive amounts of gain (+53dB) when disconnecting the two biasing resistors on the upper J201 but my breadboarded Mu-amp only starts to sputter/gate when I disconnect them and resorts to overdriven boost mode when put back in.

Substitutes/addons
The two upper 1M resistors for two 1.5M ones
Source resistor for a 2.2k
10mF for a 68nF
Added 1 uF caps at input and output.

Lower J201
G 0.80mV
S 0.228
D 9.04

Upper J201
G 9.07
S 9.02
D 9.25


http://www.geofex.com/Article_Folders/foolwfets/foolwfets.htm

[Kipper4]

Short on upper Dg.
Upper fets gate should be around V/2

[Woolly Mother Mammoth]

Short on upper Dg.
Upper fets gate should be around V/2

The circuit is feed 18v so the 9v on the gate is correct.

[PRR]

> The circuit is feed 18v so the 9v on the gate is correct.

Yet your sim-pic shows 9V to the top JFET.

[Woolly Mother Mammoth]

> The circuit is feed 18v so the 9v on the gate is correct.

Yet your sim-pic shows 9V to the top JFET.

If you look again you will see that to the right there is a 18v going to the voltage divider. Just because I was lazy, rather than making yet another VD at the drain of the upper Jfet I created a 9v source instead. I realize now that I could have just bridged the Vref from those VD resistors straight to the drain and saved me even more hassle.  I'm not very good at this yet.

[Woolly Mother Mammoth]

Wait a minute.. when pulling the separate VD for the upper J201's Drain I noticed the 1.5meg dividers only produced around 2v for the 68nF cap and Gate. Swapped the 1.5Megs for 2k as a test and got a steady 9v. From there on, remembering RG's article talking about how the 2550 Ω resistor was not necessary, I connected the upper J201's Drain straight to the Vcc+ . This resulted in much lower output with a clean signal, unless of course the signal gets boosted upfront into the Mu-amp.

Tested with a 440 sine and there is very little crossover distortion. There are some there but it is barley visible. The square wave shaving at the top is much more prominent and so is the lack of any at the bottom.

[PRR]

> If you look again you will see that to the right there is a 18v going to the voltage divider.

I see all that.

But the gate of the upper JFET must be set to about half of the total supply voltage.

Instead you have measured up double and cut it in half.

Look. Say you have a dog-house 9 feet high. And you get a second dog. And build a second floor for him. Do you measure up 18 feet, mark the middle, and set the upper floor there?


Like dogs, JFETs need space, supply voltage "height". In a 2-dog house you might give each dog the same height. Not in my house- one dog is 3X the height of the other. But audio swings BOTH ways and roughly equally each way.

[PRR]

Also C4 polarity is probably wrong.

[Woolly Mother Mammoth]

> If you look again you will see that to the right there is a 18v going to the voltage divider.

I see all that.

But the gate of the upper JFET must be set to about half of the total supply voltage.

Instead you have measured up double and cut it in half.

Look. Say you have a dog-house 9 feet high. And you get a second dog. And build a second floor for him. Do you measure up 18 feet, mark the middle, and set the upper floor there?


Like dogs, JFETs need space, supply voltage "height". In a 2-dog house you might give each dog the same height. Not in my house- one dog is 3X the height of the other. But audio swings BOTH ways and roughly equally each way.

That analogy made me chuckle, imagining myself carefully measuring 18 feet only to set the next floor at roof level, somebody better call ASPCA. Poor doggie. I managed to sort of figured this out in the sine wave post above but I am still confused as to why I'm not getting more crossover distortion and less square wave shaping in the upper part of the signal?

[Woolly Mother Mammoth]

Maybe I am expecting too much out of this emulation but the crossover distortion is nonexistent in both the breadborded Mu-amp and the simulated one in LTSpice, so is the clipping of the bottom part of the waveform. This is what I get if the signal is really pushed into the front of the amp. Is there anything that can be done to improve the crossover distortion?

Digital oscilloscope

LTSpice

[rankot]

You're missing a point. R5 and R2 are not configured well in your schematic. Try this:

Code Select Expand


Version 4
SHEET 1 1820 936
WIRE 112 -432 -48 -432
WIRE 464 -432 112 -432
WIRE 112 -400 112 -432
WIRE -48 -368 -48 -432
WIRE 464 -352 464 -432
WIRE 112 -288 112 -320
WIRE 192 -288 112 -288
WIRE 352 -288 272 -288
WIRE 416 -288 352 -288
WIRE -48 -240 -48 -288
WIRE 112 -240 112 -288
WIRE 352 -224 352 -288
WIRE 112 -128 112 -160
WIRE 352 -80 352 -160
WIRE 464 -80 464 -256
WIRE 464 -80 352 -80
WIRE 576 -80 464 -80
WIRE 720 -80 640 -80
WIRE 800 -80 720 -80
WIRE 464 -64 464 -80
WIRE 720 -48 720 -80
WIRE 32 0 -64 0
WIRE 192 0 96 0
WIRE 272 0 192 0
WIRE 416 0 352 0
WIRE 464 48 464 32
WIRE 560 48 464 48
WIRE -64 80 -64 0
WIRE 464 80 464 48
WIRE 560 80 560 48
WIRE 720 80 720 32
WIRE 192 144 192 0
WIRE 464 192 464 160
WIRE 560 192 560 144
WIRE 560 192 464 192
WIRE 464 208 464 192
WIRE -64 288 -64 160
WIRE 192 288 192 224
WIRE 192 288 -64 288
WIRE -64 320 -64 288
FLAG -64 320 0
FLAG 464 208 0
FLAG 112 -128 0
FLAG -48 -432 9V
FLAG 720 80 0
FLAG 800 -80 OUT
IOPIN 800 -80 Out
FLAG -48 -240 0
SYMBOL voltage -64 64 R0
WINDOW 123 24 152 Left 2
WINDOW 39 24 124 Left 2
SYMATTR Value2 AC ac .1
SYMATTR SpiceLine Rser=10k
SYMATTR InstName V2
SYMATTR Value SINE(0 .1 440)
SYMBOL cap 96 -16 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C1
SYMATTR Value 47n
SYMBOL res 448 64 R0
SYMATTR InstName R2
SYMATTR Value 2k2
SYMBOL cap 336 -224 R0
SYMATTR InstName C3
SYMATTR Value 68n
SYMBOL res 288 -304 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R4
SYMATTR Value 560k
SYMBOL res 96 -256 R0
SYMATTR InstName R5
SYMATTR Value 10k
SYMBOL res 96 -416 R0
SYMATTR InstName R7
SYMATTR Value 10k
SYMBOL njf 416 -64 R0
WINDOW 3 61 57 Left 2
SYMATTR Value J201
SYMATTR InstName J1
SYMBOL njf 416 -352 R0
WINDOW 3 61 57 Left 2
SYMATTR Value J201
SYMATTR InstName J2
SYMBOL cap 576 -64 R270
WINDOW 0 32 32 VTop 2
WINDOW 3 0 32 VBottom 2
SYMATTR InstName C15
SYMATTR Value 1µ
SYMBOL res 704 -64 R0
SYMATTR InstName Load
SYMATTR Value 100k
SYMBOL cap 544 80 R0
SYMATTR InstName C2
SYMATTR Value 22µ
SYMBOL res 176 128 R0
SYMATTR InstName R1
SYMATTR Value 2Meg2
SYMBOL res 368 -16 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R3
SYMATTR Value 10k
SYMBOL voltage -48 -384 M0
WINDOW 123 24 152 Left 2
WINDOW 39 24 124 Left 2
SYMATTR InstName V1
SYMATTR Value 9
TEXT -504 -104 Left 2 !.tran .02
TEXT -504 -72 Left 2 !;.ac oct 16 10 50k


Copy this code, paste into text editor and save as whatever.asc, then open in ltspice.

[Woolly Mother Mammoth]

Thank you Rankot! I totally forgot PRR's setup with the 1M in series from the Vref/2. Very much like what is shown here. http://www.geofex.com/Article_Folders/modmuamp/modmuamp.htm

[rankot]

Is it working now?

[Woolly Mother Mammoth]

Is it working now?

As far as clipping both sides of the signal equally, yes it finally does or should I say did. To get some sort of "crossover" distortion going (Edit: It is definitely not crossover) I had to remove the 1k resistor (from Geofex Noiseless biasing, in between the lower and upper J201) and also scale down R7 from 560k to 100k . As expected it alters how the top and bottom are clipped (uneven and mellows out the clipping) but we are getting closer to what I am aiming for. It does not sound like completely garbage right now actually, a warm compression with some chunk in it for lack of better words. That is if it is driven in moderation. Will probably go back to a 1Meg for R7 in the future to even out the clipping.

[rankot]

You may try with potentiometer instead of R2 and you can try to make R4/5 bigger, too.

[Woolly Mother Mammoth]

You may try with potentiometer instead of R2 and you can try to make R4/5 bigger, too.

It's a good idea, I'll give that go tonight.

Up until last night I had no idea that crossover distortion is a constant thing and that could explain why I'm seeing so little c.d. on my highly amplified signal ( into the Mu-amp ). Next experiment for me is to chain several Mu-amps in series ( and then post amplify them, if needed) to see if the notch distortion gets more prominent.

Thanks Ranko, Klipper and PRR for helping a fool like me with in this, it means a lot. I'll go ahead and give this thread a rest now. I hope it may help somebody with similar issues in the future.

[amptramp]

The geofex site has two circuits that operate differently.  Your design is like the first illustration and is basically a grounded-source amplifier feeding a current source load.  This has a high gain because the lower FET is set up as an amplifier with a high output impedance and the upper FET is a current sink with a high output impedance.  There is a small range of linear amplification where the current from the amplifier is a close match to the current in the sink.  If you add a moderately low impedance to the output, the linear range will be extended since there will be somewhere for the difference in current to go.

The third illustration (which is not the one you are following) adds a resistor between the lower drain and the upper source with the output taken from the top of the resistor.  As the lower transistor current increases, it increases the negative bias on the upper stage so its current goes down and as the lower transistor current drops, the reduced current allows the bias to be reduced so the upper transistor conducts more current.  This is called the SRPP (shunt-regulated push pull) circuit and the swing of the upper transistor matches the swing of the lower transistor if the value of the resistor between them is the reciprocal of the transconductance of the upper FET.  This is a series connection of two current sources and works well to slam the output against the rails unless there is a resistive load that provides a path for the difference current between the upper and lower FET's.  As with the µ-amp, the SRPP requires a load in order to remain in its linear range.