Cornish Buffer Help

[yeeshkul]

So, if i rephrase my question - do i need the bootstraping at all if i need a buffer with roughly about 100k input impedance? I guess i can use just a standard topology and drag the input impedance down by something like a 100k pulldown across the input, right? Then i can keep the standard base bias divider at something like 470k/220k, bacause those resistors count as in parallel together and in parallel with the pulldown when counting the input impedance.

[bonehead1972]

I went through the posts and now it looks a bit more clear (to me) why part values are crucial in this case. I measured all the resistors and found that R4 and R5 read 118k instead of 120k. Would you suggest to replace them for 120k ones, or it can go fine as being "part tolerances" it's been already soldered:) by the way I tried 2.2M resistor across the input and it sounds a lot better to me..
Thank you guys!

[antonis]

I measured all the resistors and found that R4 and R5 read 118k instead of 120k. Would you suggest to replace them for 120k ones, or it can go fine as being "part tolerances"

Let them there, as they are..

Base bias voltage difference should be about 80mV (both for voltage divider higher point and Base bias resistor lower voltage drop) meaning Emitter should be biased at a level 80mV higher than theoretical value..
(no big deal at all..)

As for input impedance, it should be less than 2% lower than the one estimated for 120k..
(no big deal again..)

[antonis]

@yeeshkul: Take into account that 10k series resistor should be added on signal source output impedance rather than on buffer input one..
(despite its placement after R1..)
It actually "lowers" buffer's input impedance in the mean of dominating voltage divider level (Z_buffer / [Z_source + Z_buffer])

[yeeshkul]

Thank you Antonis!

[antonis]

Thank you Antonis!

You're welcome..
But interchange R2 & R3 to have a happy biased buffer..