Need some advice on a Parallel Signal Splitter/Blender I designed

[vmwhelan]

Hey guys, I'm looking for some advice on a parallel signal splitter blender I'm working on.  I've built a couple stripboard & protoboard fuzzes, ODs and boosts, but this is the first pedal I'm actually trying to design on my own.  I've spent a lot of time simulating the circuit in LTSpice (other than the switching part) and I think I've got it to a place where it will actually work how I want it to. 

I am basically trying to recreate the Signal Blender pedal by Old Blood Noise Endeavors (with one minor change), without having access to that pedal or a schematic of it.  I used the Splitter-Blend from Runoffgroove as a jumping off point, but that pedal only splits the signal into 2, whereas the Signal Blender gives the option to keep your original signal in the mix as well.  Because of that, its necessary to have a level control for each of the 3 signal paths instead of just one mix knob that blends A & B.  In order to do this, I've taken the JFET buffer and added a pot (as variable resistor) at the drain to either cut or boost the signal.  Also because there are now three signals, as with the OBNE SB, I've added the phase polarity switch to both FX signals so either one can be matched to the phase of the original clean signal.

One major difference between this pedal and the OBNE pedal is the true bypass route.  In the demo video for the Signal Blender, they said that the pedal is true bypass when all three signals are switched off.  As far as I know, that pedal's bypass path is simply Input > Output.  With this pedal, I wanted to keep the option of having one of the FX loops active when all all switched off, so this pedal's path should be Input > FX Send B > {External FX Pedals} > FX Return B > Output.  In order to do this, I'm using a 3PDT for the clean footswitch, a 4PDT for signal B footswitch, a DPDT for signal A footswitch, and a CD4051 CMOS chip to route the Return B jack directly to the output jack in the case that all signals are off.

I've attached the schematic in the image below.  The basic idea is this:  Signal in is split into three pathways, signals A & B go through a buffer then an FX send/return, the JFET boost stage, and an output buffer.  The clean signal is the same, except for the send/returns, so: input buffer > JFET boost > output buffer.  From there all three combine and go through a summing op-amp stage to the output.  Like I said, I ran this through LTSpice as I was designing it and all the outputs seem to be fairly equal.

So I have some questions and I'd love to get a general critique of the circuit.  Is there anything that looks like overkill or might be missing? Do you think this will actually work as described?

• Is this the best way to split the signal (split raw signal, then 3 buffers), or would it be better to have a single buffer, then split.  Or both (buffer, split, then three more buffers)?


• I originally designed this with a fixed JFET boost at each signal (Rd = 10k, Rs = 1k) with a volume voltage divider after the output buffers (a 10k divider before those 22k resistors at the end of the output buffer stages); however, I realized recently that if the FX loops already have too much gain, that may cause some clipping.  Instead I decided to get rid of the volume pots and make Rd variable.  Is this the best solution?  I also considered keeping the volume pot and either making Rd a trimpot (though that would be a pain in the ass to adjust if the FX gain is high), or just having a vol pot and a gain pot for each signal.  Would that be better, or is the vol put unnecessary?  I'm trying to keep the signal fairly clean other than the external FX loops.


• If I did go with a vol pot and a gain pot, would a dual gang pot work?  I've never experimented with that, not sure if anyone here has experience with that.


• Will the JFET boost stage work like I think (provide a volume cut or a boost)?


• Am I correct in using a log taper for the gain? I'd like to try to get unity gain around 12 o'clock if possible.


• When some but not all of the signals are off, will the location of the disconnect switch be ok? Right now, the switch is before the input buffer.  Should it be after the FX returns instead?  Not sure if there will be noise the way it is set up now.  I attached a picture showing how I have the footswitches wired, and a possible alternative wiring scheme for Footswitch B.


• If you were building this, would you set up the dual op amps this way (send and return for each signal on one IC) or would you do sends on one IC and returns on the other?  I guess it really depends on how you set up the pcb.


• I got the idea to use a CMOS chip for the output switch from this schematic: https://www.aronnelson.com/gallery/main.php/v/Processaurus/rat_muff_switch.gif.html?g2_imageViewsIndex=1.  On the control voltages, he has a resistor and cap in parallel to the LED, anyone know why?  Do I need them here?


• The 2N5457s I got from Jameco don't seem to really match spec.  I tested them using the Fetzer valve tester for Vp and Idss and got very different results than the typical ones listed on the fetzer valve page.  I don't have the measurements in front of me, but I'm pretty sure my Vps were all <1.  I think around 0.7 or 0.8.  Will the JFET I use need to be biased differently?  Will the drain/source resistors be fine as is, especially since I'm planning on using a pot for the Rds?

Thanks in advance for your help.  Hope this all works out well.  If the circuit seems ok, I'll probably be designing my first PCB.  Don't think I could fit this on a stripboard.  Already have a 1590XX enclosure for this project, so hopefully that is big enough.

[FiveseveN]

That's all really very nice, but have you heard of things like LV3327PV?
Don't know how comfortable you are with microcontrollers but anything has to be better than a DPDT, a 3PDT and a 4PDT. At least use CMOS for all the switching.

[vmwhelan]

Well I have now  .  Honestly I thought about using a microcontroller and something like a PT2258 (I used one of those to create a multiroom audio system for my house to tie into homeassistant and my google home) but I wanted to try to keep it mostly analog and not have to write any code.

I'll look into it though, but I'm still interested in seeing if this will work.  Mostly from a learning standpoint.  Otherwise, I'd just buy a Signal Blender.

[PRR]

> 2N5457...don't seem to really match spec.  ... I'm pretty sure my Vps were all <1.

https://www.onsemi.com/pub/Collateral/2N5457-D.PDF
Gate−Source Cutoff Voltage 2N5457 (VDS = 15 Vdc, iD = 10 nAdc) VGS(off) −0.5 to −6.0
It is perfectly within spec to give you all near an extreme.

You surely need a resistor in series with those LEDs.

I do not understand three switches (and three LEDs) to control an 8-in MUX, inputs wired from only two sources.

CD4051 surely will work better with analog inputs biased halfway between the supply rails.

The input impedance at IN may vary from 1Meg to 333k, or infinity, or SEND impedance. Which may be OK, but then why all these buffers?? And why buffer the input of a JFET gain stage, which is already high-enough?

Do you really want all three paths contributing output all the time? Seems like some setups will want just one, or another. The "silent" channels will tend to add noise(hiss).

[vmwhelan]

> 2N5457...don't seem to really match spec.  ... I'm pretty sure my Vps were all <1.

https://www.onsemi.com/pub/Collateral/2N5457-D.PDF
Gate−Source Cutoff Voltage 2N5457 (VDS = 15 Vdc, iD = 10 nAdc) VGS(off) −0.5 to −6.0
It is perfectly within spec to give you all near an extreme.

Gotcha.  When I tested them using the ROG Fetzer Valve test circuit, which listed their average Vp as -1.58V (spanning from -1.22 to -1.80), they were all way off, but I had a couple from smallbear from a while ago that were closer to what ROG had.  I assumed the ones I got from Jameco were way off.

You surely need a resistor in series with those LEDs.

Of course, can't believe I missed this, it's like circuitry 101.  I usually don't add them to the schematic, just wire them directly (in series with a resistor) to the DC jack/footswitch.  I think I missed it because in that link I posted above (in #8), he has his LED running directly to ground with a resistor and a cap in parallel.  I'm still not sure why his circuit is set up that way.

I do not understand three switches (and three LEDs) to control an 8-in MUX, inputs wired from only two sources.

The LEDs aren't part of the control, I'm simply replacing the part of the footswitch that would connect the LED to Ground with this portion of the circuit that controls the CD4051 (and still keeping LED functionality).  The LED in this case runs parallel to the voltage that runs to the A/B/C controls of the 4051.  The idea is that if any combination of A, B, or C (or all) are active, the 4051 will connect the output jack to the output of the summing opamp stage of the circuit.  If A, B & C are all off, the output jack routes directly to the Return B jack.  If all three are off, the input will go to send B (via the footswitch) and return B will go to the output jack (bypassing the mixer, via the 4051).  However, if A is still active and B & C are off, the A part of the circuit will still be active, the output jack will connect to the summing opamp output, and the B/C part will be an open circuit.  0-0-0 activates Ch0.  Any other combination activates Ch1-7, they're linked together so it doesn't matter which of those channels is active.  I can't route the output jack to the return B jack via the footswitch, otherwise path A will be useless if B & C are off.

If there is a better way to do this, or a better IC to control the switching, please let me know.  I just know that the 4051 has 3 control inputs (A/B/C) which I'd need, and if I link Ch1-7, I can route the output jack two different ways.

CD4051 surely will work better with analog inputs biased halfway between the supply rails.

How would that work?  I know how to bias using half the supply voltage, but the way I'm using it is to directly connect 2 jacks in bypass mode.  Not sure how I'd remove the DC from the signal in bypass mode (0-0-0).

The input impedance at IN may vary from 1Meg to 333k, or infinity, or SEND impedance. Which may be OK, but then why all these buffers?? And why buffer the input of a JFET gain stage, which is already high-enough?

I based this off the ROG Splitter-Blend, which splits the input into 2, runs them each through a buffer before each SEND.  After the RETURN, one of them has a FET (for impedance matching I believe, based on a comment I read on the madbean forums), then they both run through op-amps (one with a phase polarity switch) before mixing via a voltage divider blend pot.  Because I'm adding a third signal (clean), I had to do it a little different.  I put the input buffers there to boost the signals before the SENDs.  The FETs on the return act as a cut/boost so I can dial in the signal levels for all three sources (can't use a simple blend pot for 3 signals, so I have to use the summing opamp).  The OpAmp after the FETs is so I can switch the phase polarity of either FX A or B if necessary.  The clean signal is set up the same way except for the send/returns because if i left any of them out, I wasn't getting good results when I ran the simulations in LTSpice.  This was the only way I could get the frequency response curves to be the same for all 3 signal paths.  Maybe it would be a little different in practice?

Because of the way I'm attempting to use the switches to create a true bypass with one of the FX loops, I don't think I'd be able to add a pulldown resistor to the 1/2 supply right at the input.

Do you really want all three paths contributing output all the time? Seems like some setups will want just one, or another. The "silent" channels will tend to add noise(hiss).

Sometimes I do, sometimes I don't.  The way I planned the footswitches allowed each path to be turned on/off independently.  Is there a better way to do this do reduce noise?  Not sure if the alternate footswitch wiring diagram I attached above would be better.

[PRR]

> in that link I posted above (in #8), he has his LED running directly to ground with a resistor and a cap in parallel.

There is 5k directly in series with each LED.

The other R-C may be to shape the on/off pulses to the '4052.

[vmwhelan]

> in that link I posted above (in #8), he has his LED running directly to ground with a resistor and a cap in parallel.

There is 5k directly in series with each LED.

I think I need to get more sleep.