ABY for three amps with volume on each output?

[elenore19]

Hi everyone.
I'm looking to build a pedal that would allow me to run 1 guitar into it. Then from that have 3 outputs that I could control the guitar volume of each.

I'm not good at conceptualizing things on my own, but basically I'm thinking guitar in that then is footswitched into each channel with a 500k pot in series with the signal to the output from each footswitch? (If that makes sense?)

Is this possible? Are there other things I'm missing. Do I need any added capacitors or resistors, or would this work? I'll use 3pdt switches to give LED indications.

Maybe there's already plans to make a pedal exactly like this that I couldn't find?
Thanks for the help. Sorry if this is posted in the wrong spot.
Any advice/guidance is greatly appreciated. Thanks in advance!

-Elliot

[iainpunk]

so basically 3 buffers with volume controls.


cheers, Iain.

[willienillie]

ABY?

Or ABCΨ?

[GibsonGM]

The answer most likely lies in here:  http://www.muzique.com/lab/splitter.htm

Same concept can be taken to opamps, etc.   I made the JFET version here, an ABY, that works awesome. Of course you'll have to monkey up some switching to do more than "1 or 2"....

[elenore19]

so basically 3 buffers with volume controls.


cheers, Iain.

Are buffers required? In my mind it's just switching the signal to a different output on the pedal with a pot in series?

ABY?

Or ABCΨ?

Yeah like an ABY but with three outs instead of two. Also volumes for each of those outs. Not sure what the ABCΨ is. Maybe that's what I'm looking for?

The answer most likely lies in here:  http://www.muzique.com/lab/splitter.htm

Same concept can be taken to opamps, etc.   I made the JFET version here, an ABY, that works awesome. Of course you'll have to monkey up some switching to do more than "1 or 2"....

Hm interesting. Looks easy enough. Would still prefer to keep it as minimal as possible, and wonder if the buffers are needed.
Since two of you suggested that, I'm thinking I'm in the wrong and will need buffers to make it possible.

[Unlikekurt]

The simple answer without much explanation: Buffers are necessary to combat signal and treble loss resulting from feeding three inputs at once.
You also might want to consider transformer isolation on two of those outputs.  Three guitar amps all sharing ground has the penchant to result in some undesirable hum.

[elenore19]

The simple answer without much explanation: Buffers are necessary to combat signal and treble loss resulting from feeding three inputs at once.
You also might want to consider transformer isolation on two of those outputs.  Three guitar amps all sharing ground has the penchant to result in some undesirable hum.

Thanks! That's very insightful and helps a lot.

Would I encounter the same issues with only 2 amps involved? Like a basic ABY pedal with the pots in series like I've mentioned above?

[GibsonGM]

I'd suggest trying the JFET ABY and seeing how it works out, if it's not too inconvenient for you to put together. It's a simple circuit that will have value for you anyway, most likely...as long as getting parts isn't a problem or anything.    Then try it out, see if isolating them is required.   I haven't had issues with it, but I may have been lucky, or something else may have been preventing ground issues.    Kurt there has a good point!

[Unlikekurt]

Gibson has a point. He has suggested a rather simple circuit that can be easily breadboarded up.  You sort of have to decide if you want to enjoy the process of building something and then possibly building something else before you get to what it is you want/need or if the building and troubleshooting isn’t really the joy and you want all the bootstraps (ee pun?) designed in from the start.

[antonis]

so basically 3 buffers with volume controls.

cheers, Iain.

Of 16k total input impedance..

[PRR]

> 16k total input impedance..

Look again. Only one bias divider.

[antonis]

Very true and Correct..!! 

But now, 100k//100k divider has to be 10 times lower than 3.3k X (h_FE + 1)..

[iainpunk]

so basically 3 buffers with volume controls.

cheers, Iain.

Of 16k total input impedance..

i admit that i forgot the 1M that separates the node between the 100k's and the signal, i shouldn't post while intoxicated.
but 16k seems a bit sketchy. if the Hfe of the transistors is 200, each individual buffer has an input resistance of 2M, 3 of that in parallel is 666k (not today, satan), in parallel with the 50k is 46.5k, owkay not ideal, but far from 16k.
when the 1M is added in, i get an impedance of about 399kΩ, that's quite acceptable imho

cheers, Iain

[antonis]

but 16k seems a bit sketchy.

Indeed..!! 
(Paul notified it above..)

Accidentally considered 3 X 100k//100k bias resistors as total input stage impedance..

As it is, it shouldn't be a problem for 3k3 (10k//10k//10k) X 200 total Base's impedance to be fed from +4.5V in series with 50k resistance (bias configuration Thevenin equivalent)..
(marginally less than 300mV drop from +4.5V to each BJT Base..)

Though, lower divider resistor value could be 120k to effectively bias each Emitter on 4V or better 150k for Emitters bias on precisely 4.5V..
BTW, for fully symmetrical output swing (current source/sink), Emitter must be biased at higher than Vcc/2 voltage level but this could lead to off-topic discussion..

[iainpunk]

BTW, for fully symmetrical output swing (current source/sink), Emitter must be biased at higher than Vcc/2 voltage level but this could lead to off-topic discussion..

when i'm finished with my 2 projects im currently working on, ill start a thread on that topic!

cheers, iain

[antonis]

BTW, for fully symmetrical output swing (current source/sink), Emitter must be biased at higher than Vcc/2 voltage level but this could lead to off-topic discussion..

when i'm finished with my 2 projects im currently working on, ill start a thread on that topic!

PLz DON'T do it..!! 
(unless you deal with incomig signal of amplitude greater than (V_Emitter * R_Emitter) / (R_Emitter + R_Load))

[iainpunk]

BTW, for fully symmetrical output swing (current source/sink), Emitter must be biased at higher than Vcc/2 voltage level but this could lead to off-topic discussion..

when i'm finished with my 2 projects im currently working on, ill start a thread on that topic!

PLz DON'T do it..!! 
(unless you deal with incomig signal of amplitude greater than (V_Emitter * R_Emitter) / (R_Emitter + R_Load))

im going to cascade a bunch of low gain transistor stages and turning them down with resistive dividers so i can impart a bunch of nonlinearity into a clean signal, but without really clipping it!, i want to keep it sounding clean, but ''harmonically enriched''