The Official Critique My PCB Thread

[Fancy Lime]

Hi all,

I finally got my first PCB for sending off to a fab house ready. Not the first one I designed but I never actually etched any of my previous attempts or had them produced. So I'd by much obliged if someone with some experience could tell me my worst mistakes before I send this off. The board is (supposed to be, at least) designed to fit in a 1590A with 16mm Alpha print pots but without a foot switch. The two areas at both narrow ends that contain only resistors and no caps are supposed to serve as recesses for the jacks. I intend to use this thing as an amp simulator for headphone practicing and demo recording, so no point in having a foot switch. A 1590B or BB would accommodate the board and a foot switch, if necessary. It may or may not be somehow possible to get it into a 1590A with a switch as well if using 9mm pots but I did not run the numbers on that.



Front and back images are composites of the respective copper and silkscreen gerber layers. And some 3D renderings because I just learned how to do those (the header pins are not going to be installed and are only there because they provide a convenient way to get pads for cable installation when using KiCad):





I am a bit puzzled why the back silk screen goes over the pads, since the "Exclude pads from silkscreen" option was ticked during plotting of the files. It may or may not have to do with the fact that I made my own footprint for the pots. The footprint code is this, in case anyone can tell me if that is the problem by looking at it:

Code Select Expand

(module Potentiometer_THT:Potentiometer_Alpha_16mm_PCB (layer F.Cu) (tedit 60316FE5)
  (fp_text reference REF** (at 0 -5) (layer F.SilkS)
    (effects (font (size 1 1) (thickness 0.15)))
  )
  (fp_text value Potentiometer_Alpha_16mm_PCB (at 0 -0.5) (layer F.Fab)
    (effects (font (size 1 1) (thickness 0.15)))
  )
  (fp_line (start -8.5 0) (end -8.5 -16) (layer F.SilkS) (width 0.15))
  (fp_line (start 8.5 -16) (end 8.5 0) (layer F.SilkS) (width 0.15))
  (fp_line (start -8.5 -16) (end 8.5 -16) (layer F.SilkS) (width 0.15))
  (fp_line (start 0 -7.5) (end 0 -24.5) (layer F.SilkS) (width 0.15))
  (fp_circle (center 0 -16) (end 3.75 -16) (layer F.SilkS) (width 0.15))
  (fp_circle (center 0 -16) (end 8.5 -16) (layer F.SilkS) (width 0.15))
  (pad 3 thru_hole circle (at 5 0) (size 2.4 2.4) (drill 1.2) (layers *.Cu *.Mask))
  (pad 2 thru_hole circle (at 0 0) (size 2.4 2.4) (drill 1.2) (layers *.Cu *.Mask))
  (pad 1 thru_hole rect (at -5 0) (size 2.4 2.4) (drill 1.2) (layers *.Cu *.Mask))
)

The trace widths and clearances are well above any minimum specifications that any of the major fab houses seem to use, although I only bothered to check Aisler and Oshpark in detail. There is a bit of naming discrepancy between schematic and silk screen, which is due to the fact that KiCad needs to have all identifiers numbered but I did not want to have numbered names for the pots etc. that have unequivocal names anyway. The main remaining questions are:

- Are there any glaring design flaws in the schematic? I checked it over and over but I've had catastrophic mistakes in schematics in the past despite doing the same. I know it works on my breadboard but I am never fully sure that I traced it correctly. Of course you can only check the topology and the basic feasibility of the values.

- Are there any obvious problems in the PCB staring anyone in the eye?

- Should I break the many many ground loops in the back layer? Theory says YES but most commercial designs seem not to bother with that. I wonder if it makes any practical difference.

- Do I want to fill the empty space in the front copper with ground pour as well? And if so, do I want to connect it to the back ground pour at a single point or with a gazillion vias, like some commercial designs seem to do? Or do I want to have a pour but not connect it to anything?

- The paths of least resistance for ground currents are more convoluted than I would like them to be. Is that as bad as it makes me feel or is that just my OCD?

- I tried to choose the footprints for caps and resistors fairly generously so that one is not limited to using particularly small devices because I want to release the gerber files to the public in the end so anyone can build this with easily attainable parts. Do any footprints strike you as too small for a specific component?


Thanks for your help and sorry for the noob questions,
Andy

[ElectricDruid]

People have different views on it, but with a small board like that, and with nice low frequencies like audio, I think your ground plane is fine. My view is that the more copper you have joining stuff up, the closer to the ideal the whole ground becomes. Personally, I don't bother also routing ground traces - I just let the ground plane do that job. But if more copper is better and you've got the space, then why not?

The silkscreen-over-pads thing might only be on the render. I know that Diptrace (which I use) shows the full silkscreen, even over holes and such like. The PCBs never come back like that, so either it's just on their render, or the PCB house themselves mask the silkscreen with one of the other layers to make sure no ink goes where it shouldn't.

I think the parts footprints look ok. The diodes look short on the render, but it might just be because they're so fat. One thing I do on boards for public consumption is add an extra pad for the caps so people can use either 0.2"/5mm or 0.3"/7.5mm spacing caps. It takes up more room on the PCB, but it makes life easier.

HTH

[POTL]

I often see recommendations for polarized components, which say that ori should be located in one direction, for example, minus always looks in one direction of the board. Also, I would arrange all the components either along or across the board, and not like yours, when the components are located in different ways.