Buffered summer for combining piezo and mag signal to mono?

Started by BlueLdr, April 23, 2021, 07:08:48 PM

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BlueLdr

Hey everyone! I recently got a new guitar with a stereo output jack, and I need to combine the signals to send them into the post FX loop in mono. I tried a Y-splitter that I had laying around and, as you'd expect, it didn't work too well (volume fluctuations, etc.). What are some good circuits to achieve this? I've done some research, and I'm decent with a soldering iron, but I don't know enough to feel confident about putting something together without a schematic. Of course, it's particularly important that MuH tOnE is unaffected.

I'm aware that I should have a separate chain with a DI box, etc. for the piezo signal, but this is just a home practice setup, so I'm not interested in doing anything fancy or expensive (at the moment).
Here's a diagram of exactly what I'm looking to build. I expanded it a bit to allow switching with a second guitar with a normal mono input. When switched to this input, the summer would be bypassed.


GGBB

Welcome to the forum. The blend section of the Splitter-Blend should do the trick: http://runoffgroove.com/splitter-blend.html.
  • SUPPORTER

iainpunk

i recommend using 2 Jfet buffers at the very start of the signal chain, even before switching, this ensures impedance matching.
then the summing amplifier can be an off the shelf 'inverting summing amplifier'.

cheers
friendly reminder: all holes are positive and have negative weight, despite not being there.

cheers

BlueLdr

Quote from: iainpunk on April 24, 2021, 10:54:05 AM
i recommend using 2 Jfet buffers at the very start of the signal chain, even before switching, this ensures impedance matching.
then the summing amplifier can be an off the shelf 'inverting summing amplifier'.

Do you have a particular schematic in mind?

Quote from: GGBB on April 23, 2021, 08:47:07 PM
Welcome to the forum. The blend section of the Splitter-Blend should do the trick: http://runoffgroove.com/splitter-blend.html.

Would I gain anything by using a higher quality op amp than a TL072?

iainpunk

Quote from: BlueLdr on April 25, 2021, 01:55:51 AM
Quote from: iainpunk on April 24, 2021, 10:54:05 AM
i recommend using 2 Jfet buffers at the very start of the signal chain, even before switching, this ensures impedance matching.
then the summing amplifier can be an off the shelf 'inverting summing amplifier'.

Do you have a particular schematic in mind?
the top of this page:
http://www.muzique.com/lab/splitter.htm

cheers
friendly reminder: all holes are positive and have negative weight, despite not being there.

cheers

Ben N

  • SUPPORTER

GGBB

The only place you might need an extra buffer is at the start of your "pre fx" chain, but if you use any buffered bypass pedals (e.g. Boss) then you don't need one. Your "post fx" loop is fed either by the amp fx send or the "summer" which are effectively buffers, as is your acoustic pre amp.

There's not much gain happening in the blend circuit so a "higher quality" opamp is unlikely to be noticed amidst the noise and limited frequency response of guitar signals and amps, depending on what you mean by high quality. But it might make you feel better.
  • SUPPORTER

merlinb

Simplest option is to mix the two signals through a pair of resistors. Try something in the range of 4.7k to 10k.

BlueLdr

Hey guys, I'm revisiting this project after a long hiatus. I decided I wanted to do a little more with the mag/piezo switching.
There would be two switches that toggle the mag/piezo signals independently, with one exception: when A is on and B is off, switching A off will automatically turn B on. 

After reading this post about alternate switching methods, I figured I'd try a solid-state relay. This is the circuit I came up with (ignore the ADG821s, I just used a switch that LTSpice had built in):
EDIT: Also just realized I need to bypass the pot (faked with R17/18) when only one of the channels is on.



LTSpice .asc file
TL072 .sym/.sub from GitHub
Version 4
SHEET 1 1860 680
WIRE 1008 -560 880 -560
WIRE 800 -544 800 -576
WIRE 576 -528 576 -576
WIRE 880 -496 880 -560
WIRE 912 -496 880 -496
WIRE -304 -480 -304 -528
WIRE 1008 -480 1008 -560
WIRE 1008 -480 976 -480
WIRE 1056 -480 1008 -480
WIRE 1168 -480 1120 -480
WIRE 1360 -480 1168 -480
WIRE 480 -464 416 -464
WIRE 704 -464 672 -464
WIRE 800 -464 768 -464
WIRE 912 -464 800 -464
WIRE 1168 -448 1168 -480
WIRE 80 -400 64 -400
WIRE 272 -400 240 -400
WIRE 480 -400 272 -400
WIRE 64 -384 64 -400
WIRE 256 -384 64 -384
WIRE -624 -352 -672 -352
WIRE -592 -352 -624 -352
WIRE -480 -352 -512 -352
WIRE -400 -352 -480 -352
WIRE -304 -352 -304 -400
WIRE -304 -352 -336 -352
WIRE -272 -352 -304 -352
WIRE -160 -352 -208 -352
WIRE -96 -352 -160 -352
WIRE 16 -352 -16 -352
WIRE 64 -352 16 -352
WIRE 80 -352 64 -352
WIRE 256 -352 256 -384
WIRE -624 -336 -624 -352
WIRE -480 -336 -480 -352
WIRE -160 -336 -160 -352
WIRE 16 -336 16 -352
WIRE 1168 -336 1168 -368
WIRE -624 -240 -624 -272
WIRE -480 -240 -480 -256
WIRE -480 -240 -624 -240
WIRE -160 -240 -160 -256
WIRE 16 -240 16 -272
WIRE 16 -240 -160 -240
WIRE 64 -240 64 -352
WIRE -480 -224 -480 -240
WIRE -160 -224 -160 -240
WIRE 1360 -224 1360 -480
WIRE 1696 -224 1696 -256
WIRE 176 -208 176 -224
WIRE 208 -208 176 -208
WIRE 176 -192 176 -208
WIRE 208 -192 208 -208
WIRE 208 -192 192 -192
WIRE 208 -176 208 -192
WIRE 208 -176 192 -176
WIRE 256 -160 256 -352
WIRE 256 -160 192 -160
WIRE 64 -144 64 -176
WIRE 128 -144 64 -144
WIRE 288 -144 192 -144
WIRE 224 -128 192 -128
WIRE -1008 -112 -1008 -144
WIRE -960 -112 -1008 -112
WIRE -848 -112 -848 -144
WIRE -848 -112 -880 -112
WIRE -816 -112 -848 -112
WIRE -704 -112 -704 -144
WIRE -704 -112 -736 -112
WIRE -1008 -96 -1008 -112
WIRE -848 -96 -848 -112
WIRE -704 -96 -704 -112
WIRE 224 -96 224 -128
WIRE 1360 -96 1360 -144
WIRE 1520 -96 1360 -96
WIRE 1696 -96 1696 -144
WIRE 1696 -96 1584 -96
WIRE 1792 -96 1696 -96
WIRE 1360 -48 1360 -96
WIRE 176 -32 176 -48
WIRE 208 -32 176 -32
WIRE 176 -16 176 -32
WIRE 208 -16 208 -32
WIRE 208 -16 192 -16
WIRE 208 0 208 -16
WIRE 208 0 192 0
WIRE -1008 16 -1008 -16
WIRE -848 16 -848 -16
WIRE -704 16 -704 -16
WIRE 272 16 272 -400
WIRE 272 16 192 16
WIRE 128 32 64 32
WIRE 256 32 192 32
WIRE 64 48 64 32
WIRE 224 48 192 48
WIRE 224 80 224 48
WIRE -304 96 -304 16
WIRE 1008 112 880 112
WIRE 800 128 800 96
WIRE 576 144 576 96
WIRE 880 176 880 112
WIRE 912 176 880 176
WIRE 1008 192 1008 112
WIRE 1008 192 976 192
WIRE 1056 192 1008 192
WIRE 1168 192 1120 192
WIRE 1360 192 1360 32
WIRE 1360 192 1168 192
WIRE 480 208 416 208
WIRE 704 208 672 208
WIRE 800 208 768 208
WIRE 912 208 800 208
WIRE -624 224 -672 224
WIRE -592 224 -624 224
WIRE -480 224 -512 224
WIRE -400 224 -480 224
WIRE -304 224 -304 176
WIRE -304 224 -336 224
WIRE -272 224 -304 224
WIRE -160 224 -208 224
WIRE -96 224 -160 224
WIRE 16 224 -16 224
WIRE 64 224 64 112
WIRE 64 224 16 224
WIRE 80 224 64 224
WIRE 256 224 256 32
WIRE 1168 224 1168 192
WIRE -624 240 -624 224
WIRE -480 240 -480 224
WIRE -160 240 -160 224
WIRE 16 240 16 224
WIRE 256 256 256 224
WIRE 256 256 64 256
WIRE 64 272 64 256
WIRE 80 272 64 272
WIRE 288 272 288 -144
WIRE 288 272 240 272
WIRE 480 272 288 272
WIRE -624 336 -624 304
WIRE -480 336 -480 320
WIRE -480 336 -624 336
WIRE -160 336 -160 320
WIRE 16 336 16 304
WIRE 16 336 -160 336
WIRE 1168 336 1168 304
WIRE -480 352 -480 336
WIRE -160 352 -160 336
FLAG 224 80 CLK1
FLAG 224 -96 CLK2
FLAG 176 -48 0
FLAG 176 -224 0
FLAG -480 -224 0
FLAG -848 -144 Vcc
FLAG -848 16 0
FLAG -160 -224 0
FLAG 576 384 0
FLAG 576 96 Vcc
FLAG 576 -576 Vcc
FLAG 576 -288 0
FLAG 64 32 AND2Q
FLAG 64 -144 AND1Q
FLAG -672 -352 CLK1
FLAG -480 352 0
FLAG -160 352 0
FLAG -672 224 CLK2
FLAG -224 -528 0
FLAG -224 16 0
FLAG -1008 16 0
FLAG -1008 -144 Vdd
FLAG 416 208 INpiezo
FLAG 416 -464 INmag
FLAG 400 -160 0
FLAG 400 -32 0
FLAG 480 -160 INmag
FLAG 480 -32 INpiezo
FLAG 944 -512 Vcc
FLAG 944 -448 0
FLAG -704 16 0
FLAG -704 -144 Vref
FLAG 800 -576 Vref
FLAG 1168 -336 0
FLAG 944 160 Vcc
FLAG 944 224 0
FLAG 800 96 Vref
FLAG 1168 336 0
FLAG 1696 -256 Vref
FLAG 1792 -96 OUT
SYMBOL Digital\\and 160 -96 R180
SYMATTR InstName A1
SYMATTR SpiceLine Vhigh=5 Vlow=0 Ref=1.0
SYMBOL Digital\\and 160 80 R180
SYMATTR InstName A2
SYMATTR SpiceLine Vhigh=5 Vlow=0 Ref=1.0
SYMBOL Digital\\dflop 160 -448 R0
WINDOW 38 8 12 Left 2
SYMATTR InstName A3
SYMATTR SpiceLine Vhigh=5 Vlow=0 Trise=1m Tfall=1m
SYMBOL Digital\\dflop 160 320 M180
SYMATTR InstName A4
SYMATTR SpiceLine Vhigh=5 Vlow=0 Trise=1m Tfall=1m
SYMBOL diode 80 -176 R180
WINDOW 0 24 64 Left 2
WINDOW 3 24 0 Left 2
SYMATTR InstName D1
SYMATTR Value 1N4148
SYMBOL diode 48 48 R0
SYMATTR InstName D2
SYMATTR Value 1N4148
SYMBOL voltage -320 -528 R270
WINDOW 0 -32 56 VBottom 2
WINDOW 3 32 56 VTop 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V2
SYMATTR Value PWL(0 0 1 0 1.01 9 1.11 9 1.12 0 3 0 3.01 9 3.11 9 3.12 0)
SYMBOL voltage -848 -112 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 9
SYMBOL res -176 -352 R0
SYMATTR InstName R1
SYMATTR Value 1k
SYMBOL res 0 -368 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 1k
SYMBOL polcap 0 -336 R0
WINDOW 3 24 56 Left 2
SYMATTR Value 1µ
SYMATTR InstName C2
SYMATTR Description Capacitor
SYMATTR Type cap
SYMATTR SpiceLine V=100 Irms=15m Rser=20 Lser=0 mfg="Nichicon" pn="UPR2A010MAH" type="Al electrolytic"
SYMBOL voltage -320 16 R270
WINDOW 0 -32 56 VBottom 2
WINDOW 3 32 56 VTop 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V3
SYMATTR Value PWL(0 0 2 0 2.01 9 2.11 9 2.12 0 4 0 4.01 9 4.11 9 4.12 0)
SYMBOL diode -272 -336 R270
WINDOW 0 32 32 VTop 2
WINDOW 3 0 32 VBottom 2
SYMATTR InstName D3
SYMATTR Value 1N4148
SYMBOL res -288 -384 R180
WINDOW 0 36 76 Left 2
WINDOW 3 36 40 Left 2
SYMATTR InstName R5
SYMATTR Value 800
SYMBOL res -496 -368 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R10
SYMATTR Value 1k
SYMBOL res -496 -352 R0
SYMATTR InstName R9
SYMATTR Value 1K
SYMBOL diode -336 -368 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName D4
SYMATTR Value 1N4148
SYMBOL polcap -640 -336 R0
WINDOW 3 24 56 Left 2
SYMATTR Value 0.1µ
SYMATTR InstName C3
SYMATTR Description Capacitor
SYMATTR Type cap
SYMATTR SpiceLine V=100 Irms=15m Rser=20 Lser=0 mfg="Nichicon" pn="UPR2A010MAH" type="Al electrolytic"
SYMBOL res -176 224 R0
SYMATTR InstName R3
SYMATTR Value 1k
SYMBOL res 0 208 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R4
SYMATTR Value 1k
SYMBOL polcap 0 240 R0
WINDOW 3 24 56 Left 2
SYMATTR Value 1µ
SYMATTR InstName C1
SYMATTR Description Capacitor
SYMATTR Type cap
SYMATTR SpiceLine V=100 Irms=15m Rser=20 Lser=0 mfg="Nichicon" pn="UPR2A010MAH" type="Al electrolytic"
SYMBOL diode -272 240 R270
WINDOW 0 32 32 VTop 2
WINDOW 3 0 32 VBottom 2
SYMATTR InstName D5
SYMATTR Value 1N4148
SYMBOL res -288 192 R180
WINDOW 0 36 76 Left 2
WINDOW 3 36 40 Left 2
SYMATTR InstName R6
SYMATTR Value 800
SYMBOL res -496 208 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R12
SYMATTR Value 1k
SYMBOL res -496 224 R0
SYMATTR InstName R11
SYMATTR Value 1K
SYMBOL diode -336 208 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName D6
SYMATTR Value 1N4148
SYMBOL polcap -640 240 R0
WINDOW 3 24 56 Left 2
SYMATTR Value 0.1µ
SYMATTR InstName C4
SYMATTR Description Capacitor
SYMATTR Type cap
SYMATTR SpiceLine V=100 Irms=15m Rser=20 Lser=0 mfg="Nichicon" pn="UPR2A010MAH" type="Al electrolytic"
SYMBOL res -864 -128 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R13
SYMATTR Value 800
SYMBOL res -1024 -112 R0
SYMATTR InstName R14
SYMATTR Value 1k
SYMBOL Switches\\ADG821 576 -416 R0
SYMATTR InstName U1
SYMBOL Switches\\ADG821 576 256 R0
SYMATTR InstName U2
SYMBOL voltage 496 -160 R90
WINDOW 0 -32 56 VBottom 2
WINDOW 3 32 56 VTop 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V4
SYMATTR Value SINE(0 0.5 220)
SYMBOL voltage 496 -32 R90
WINDOW 0 -32 56 VBottom 2
WINDOW 3 32 56 VTop 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V5
SYMATTR Value SINE(0 0.5 440)
SYMBOL OpAmps\\TL072 944 -544 R0
SYMATTR InstName U4
SYMBOL res -720 -112 R0
SYMATTR InstName R8
SYMATTR Value 1k
SYMBOL res -720 -128 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R7
SYMATTR Value 1k
SYMBOL res 784 -560 R0
SYMATTR InstName R15
SYMATTR Value 1Meg
SYMBOL cap 704 -480 M90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C5
SYMATTR Value 100n
SYMBOL cap 1056 -496 M90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C6
SYMATTR Value 1µ
SYMBOL res 1152 -464 R0
SYMATTR InstName R16
SYMATTR Value 100k
SYMBOL res 1344 -240 R0
SYMATTR InstName R17
SYMATTR Value 4.7k
SYMBOL res 1344 -64 R0
SYMATTR InstName R18
SYMATTR Value 4.7k
SYMBOL OpAmps\\TL072 944 128 R0
SYMATTR InstName U3
SYMBOL res 784 112 R0
SYMATTR InstName R19
SYMATTR Value 1Meg
SYMBOL cap 704 192 M90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C7
SYMATTR Value 100n
SYMBOL cap 1056 176 M90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C8
SYMATTR Value 1µ
SYMBOL res 1152 208 R0
SYMATTR InstName R20
SYMATTR Value 100k
SYMBOL cap 1520 -112 M90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C9
SYMATTR Value 100n
SYMBOL res 1680 -240 R0
SYMATTR InstName R21
SYMATTR Value 1Meg
TEXT -880 96 Left 2 !.tran 0 5 0 0.001



While it works in simulation, I don't really know what parts to actually choose, if the values are appropriate, or if I'm missing anything. For now, in my cart at Mouser, I have some SN74 series chips for the ANDs and FFs, and the AQV210SX for the relays (the TLP222 mentioned by R.G. is now marked Obsolete and is OOS, so this seemed like the next best option).

My main questions for now are:
1. What ICs should I use? Does CMOS vs TTL matter for this application?
2. Do I need to add anything to make sure the outputs from the FFs can drive the relays? (datasheet says the trigger current is typ. 0.7mA, max 3mA)
3. Should the switching be placed where it is now, or after R16/R20 (or does it even matter)?

amptramp

The MIMF forum preamp has a higher impedance input for the piezo than the magnetic input.  Very little current comes out of a piezo, so this has to be the case so the 10 megohms as shown is not excessive.  The magnetic input has a high inductance (typically 3 to 5 Henries), so if you think of the input as a voltage divider between the inductance and the input impedance, the higher the input impedance, the more treble you will get.  Generally anything 500 K and up will preserve the treble.  In the MIMF design, you have a very low input impedance (5K1 in parallel with 100 K) so maybe they intend this input only for low frequencies.

One thing to check is the output polarity of the piezo and magnetic inputs since they can add together or subtract when they are combined.  You don't want the signals to subtract since that takes away most of the midrange signal.