How to choose the right opamp for an inverting buffer

[fryingpan]

I have an inverting buffer I'd like to put after an inverting JFET stage (output impedance, about 1-2kohm). The input impedance of the buffer should be in the order of 50-100kohm to minimise loading. Input impedance is set by R_in, with R_fb equal to the former for unity gain. I could choose either an OPA134, which is a JFET input opamp, or a NE5532, which is best suited for source impedances up to 10-20k or so, or again I could use an OPA277 which is best for impedances up to 100kohm or so. My problem is: what impedance does the opamp itself see? Is it the previous stage (so 1-2kohm) or the 50-100kohm input resistor?

On a sidenote: most audio opamps are unity-gain stable. Would an inverting stage with *less* than unity gain become unstable? In another part of the chain I have an inverting opamp which could also be used as a volume control, with R_fb as a pot.

[iainpunk]

the input impedance of an opamp is really high, for the TL072 its in the upper Mega ohm range, this is also the opamp i'd recommend getting a bunch of, its quite a great opamp.

but for something as simple as a buffer, i'd say don't worry, and just use what you have on hand, especially if you already have an opamp on the board, use a double opamp, if the resistances are kept low, lets say 1k - 10k, you shouldn't have any problem with input impedance.
the 5532 has input impedance of 30k to 100k, so i'd select 3k3 resistors, and just up the feedback resistor if the gain is actually to low.

cheers

[fryingpan]

the input impedance of an opamp is really high, for the TL072 its in the upper Mega ohm range, this is also the opamp i'd recommend getting a bunch of, its quite a great opamp.

but for something as simple as a buffer, i'd say don't worry, and just use what you have on hand, especially if you already have an opamp on the board, use a double opamp, if the resistances are kept low, lets say 1k - 10k, you shouldn't have any problem with input impedance.
the 5532 has input impedance of 30k to 100k, so i'd select 3k3 resistors, and just up the feedback resistor if the gain is actually to low.

cheers

I am worried that excessive loading on the preceding JFET stage could actually cause undue distortion (even though it is there *for* distortion). That's why I'd want to match impedances correctly (ie. buffer input impedance >> source impedance). Otherwise yeah, I could simply use, say, a 3k3 input resistor and whatever feedback resistor to restore the gain.

[GibsonGM]

Loading would come from too LOW a following input Z...a higher input impedance should minimize distortion from the previous stage...'72 is a great opamp for this use, I'd wager...now if you had a LOW input impedance following your FET, THAT would be a problem.   You should not (as Ian wrote).

[fryingpan]

Loading would come from too LOW a following input Z...a higher input impedance should minimize distortion from the previous stage...'72 is a great opamp for this use, I'd wager...now if you had a LOW input impedance following your FET, THAT would be a problem.   You should not (as Ian wrote).

Still, for an inverting opamp (the circuit) the input impedance is set by R_input. Therefore, that would mean that I should use a R_input around 50-100k. Of course a JFET-input stage opamp is OK, but since I have quieter opamps at hand, I could use them, but I don't know whether for an inverting opamp (the chip) the source impedance is the previous stage OR R_input. The question is mostly academical.

[fryingpan]

More to the point, since both inputs of an opamp are at a virtual earth, what impedance does the opamp see? Is it a parallel of the impedances at each input? Is the opamp itself tied to ground, therefore the impedance is the series of impedances at each input?

[antonis]

[PRR]

> Would an inverting stage with *less* than unity gain become unstable?

Even when the external gain is < unity, the gain seen by the inverting opamp is > unity. Worst case would be zero Rfb and infinite Rin. Signal does not go through but the opamp only sees itself at unity gain.

There is another case where a BJT is put inside the loop, typically for log conversion. But I just went past my town's Log Yard and didn't see anybody doing this.

[Rob Strand]

My problem is: what impedance does the opamp itself see? Is it the previous stage (so 1-2kohm) or the 50-100kohm input resistor?

It depends on your perspective on what is gain and what is loading effect.   You have to be very careful about doubling counting.

One perpective is JFET gain is the open circuit gain ie. what you would measure with no load on the JFET.  The output impedance of the JFET stage is the normal output impedance.  In this case, to get the correct overall gain of the two stages opamp gain uses sum of the two resistances (Rjfet + Rin on opamp).   However if you now measure the output of the JFET stage you will now get the loaded output voltage, not the no-load voltage.  Similarly if you measured  Vout for the opamp and Vin for the opamp then you would end-up with a high gain of Rf/Rin  not Rf/(Rin + Rjfet).   The overall gain is absolutely correct it's just the output of the JFET drops under load.

If you want a different perspective which is more intuitive in terms of measured voltages in the circuit then you need to factor that point in.    You want to capture the three circuit voltages:   the input to the JFET, the output of the JFET under load and the output of the opamp.   The key point is the opamp input impedance loads down the JFET output.  In this case the JFET gain is the open circuit gain.  The JFET output impedance is the normal output impedance.   The input impedance of the opamp is the Rin resistor value.   The opamp gain is Rf/Rin.    The added step is to account for the loading separately and explicitly.   We need to add the voltage divider formed by the JFET output impedance and the opamp input impedance.   The loading effect is an extra gain "drop"  of  Aloading = Rin / (Rjfet + Rin).   The voltage measured at the JFET output will then be  Vjfet = Vin * Ajfet * Aloading.   The opamp gain is always Rf/Rin.

The overall gain in the two cases is exactly the same.   The difference is the second method lets you "see" the loaded voltage of the JFET.   Also the second method lets you calculate the gains of each stage in isolation and avoids the confusion of where to put the JFET output impedance in the gain calculations - your original dilemma.   The loading effect is accounted for when the two stages are put together.

[ElectricDruid]

More to the point, since both inputs of an opamp are at a virtual earth, what impedance does the opamp see? Is it a parallel of the impedances at each input? Is the opamp itself tied to ground, therefore the impedance is the series of impedances at each input?

I think you're making this too complicated. All you really need to worry about is the output impedance of one stage and the input impedance of the next.

For your JFET, you've got 1-2Kohm output, and for the inverting input of the op-amp, you've got the input resistor in parallel with the input impedance of the op-amp input itself. This is often regarded as so large it can be ignored, which is a good assumption for things like the TL07x, but not so much for the NE553x which has a low input impedance.

Stick a TL07x in, and use your 50-100K input+feedback resistors. The input impedance is fifty times bigger than the output impedance, so losses are minimal. It'll be fine. A gain of one isn't a situation that's going to push an op-amp to the point at which you need to worry about which one you use.

[fryingpan]

The idea is to minimise noise. I know how an inverting opamp works and what loading means for the JFET stage (too small an impedance on the following stage and you'll see voltage drop, higher current output and possibly higher/worse distortion, as this is equivalent to having a smaller drain resistor).

Maybe I wasn't clear with my question.
Take an NE5532. It's very low noise (much lower than even, say, an OPA134), but only if the source impedance is less than 20k-50k or so (I should have a look at the datasheet, and I'm on my phone right now). In order to minimise loading on the JFET you should have, say, 50kohm load. This means having an R_input equal to 50kohm. If the source impedance for the opamp itself is 51kohm (because it sees the R_input as source impedance, plus the 1kohm output impedance of the JFET) then, in order to minimise noise, it might be appropriate to choose an OPA277 for instance (bipolar input with lower noise with moderate source resistances than other bipolar input opamps). If instead the opamp bypasses R_input when "computing" source impedance then I can use any bipolar input opamp because the opamp only sees the 1kohms from the JFET.

That is, of course, not taking into account the Johnson noise from the resistors themselves. At this point, I can just select a new drain resistor that equals the previous drain resistor when paralleled with a low value R_input (so low that Johnson noise is not a problem, not so low that it loads the opamp forcing it to output too much current, also with the view to minimising power consumption). Or I could go with a very high input impedance, very low output impedance buffer after the JFET and then use an inverting opamp, but this seems silly.

[Rob Strand]

The inverting configuration is never the best choice for noise.   A non-inverting stage with low-valued feedback resistors gives the lowest noise.   If the source is high impedance and you want to use an NE5532 then a JFET buffer might shave a bit more noise off (since it removes the effect of noise currents from the NE5532).   The non-inverting stage can be designed with high input impedance so the JFET has no load.

[fryingpan]

The inverting configuration is never the best choice for noise.   A non-inverting stage with low-valued feedback resistors gives the lowest noise.   If the source is high impedance and you want to use an NE5532 then a JFET buffer might shave a bit more noise off (since it removes the effect of noise currents from the NE5532).   The non-inverting stage can be designed with high input impedance so the JFET has no load.

I need an inverting buffer because the first JFET stage is asymmetrical and I have an (optional) distortion stage afterwards and if I don't invert the signal the two distortions shave off opposite peaks, making the signal more "symmetrical", whereas I want to maintain the asymmetry.

[antonis]

Why don't you use a non-inverting configuration for the first JFET stage and earn peace of mind..??

[fryingpan]

Because it has low gain and not that much headroom.

[nooneknows]

Stick a TL07x in, and use your 50-100K input+feedback resistors. The input impedance is fifty times bigger than the output impedance, so losses are minimal. It'll be fine. A gain of one isn't a situation that's going to push an op-amp to the point at which you need to worry about which one you use.

^ This

[antonis]

Because it has low gain and not that much headroom.

Can't imagine an op-amp non-inverting stage with gain lower than a JFET one..

In case of headroom is restricted by op-amp supply rails, it will also happen for inverting op-amp buffer..

[Rob Strand]

I need an inverting buffer because the first JFET stage is asymmetrical and I have an (optional) distortion stage afterwards and if I don't invert the signal the two distortions shave off opposite peaks, making the signal more "symmetrical", whereas I want to maintain the asymmetry.

Ah OK.   Sometimes you have to make do with your situation.    One idea is to use a phase-splitter, transistor or JFET, instead of the buffer and inverter.    The phase-splitter loses a bit of headroom.    I'm sure you will work out if it's suitable or not.