Magnus Modulus - Gated/distorted delays

[Woolly Mother Mammoth]

To me the voltages does not look too off but I don't really know much since it is my first time with the PT2399.
Noticed that in order to get the PT2399 to create a delay I have to hit the string/s pretty hard. When it does delay the repeats eventually gates out abruptly, like a misbiased transistor.

PT2399
1. 5.11
2. 2.55
3. 0
4. 0
5. 3.1
6. 2.54
7. 0.3 > then drops down to 0
8. 2.6
9. 2.6
10. 2.55
11. 2.55
12. 2.55
13. 2.54
14. 2.54
15. 2.59
16. 2.55

IC 5532
1. 4.71
2. 4.46
3. 4.46
4. 0
5. 4.70
6. 4.70
7. 4.75
8. 8.93

[duck_arse]

well, all your voltages look OK, so that suggests wiring errors. only, we can't see your wiring if you don't post photos of what you built. include all the off board wirings as well, please.

[Woolly Mother Mammoth]

Solved it! Found a microscopic connection (barely visible without magnification) between pin 8 and 9 on the chip. I am a happy boy now! 

[duck_arse]

awwww ....... but ....... pictures

[Vivek]

Strange that voltages were "correct" if there was a bridge between 2 pins.

[Vivek]

I cannot understand the biasing on the J201 FET

Is gate tied to +4.5V and Source at 0V ?

and we possibly swing the Gate about +/- 2V from +4.5

ie Gate is never negative WRT the Source ?