ROG Uno help

[freshmex18]

Tried for the who-knows-how-many time to build this circuit and it is still not working.  Please help.

New batch of SMD J201s from Mouser soldered onto adapter boards from Pedalpcb.  So components should be good.  But when the pedal is switched on, nothing but a whining sound.  Reflowed all connections and ran a scalpel between each row.

Q1
D 4.42
S 0.10
V 0

Q2
D 4.8
S 0.12
V 0

Q3
D 4.05
S 0.08
V 0

Q4
D 4.10
S 0.06
V 0

Circuit source:

http://www.runoffgroove.com/uno.html

Circuit layout

https://www.sabrotone.com/wp-content/uploads/2013/05/UnoMarkI.gif


Let me know what else you need from me.  Thanks

[GGBB]

Which J201s did you buy? The InterFET ones Mouser has in stock now have a different pinout than the PedalPCB adapter boards.

https://www.mouser.com/datasheet/2/676/jfet_j201_j202_interfet-2887411.pdf
https://www.pedalpcb.com/product/sot23adapter/

I've read that drain and source are interchangeable on JFETs but I don't know how universally that applies.

[freshmex18]

I got these:

https://www.mouser.com/ProductDetail/onsemi-Fairchild/MMBFJ201?qs=sGAEpiMZZMsVgcksf1EMUjCB5v9MvAEa&countrycode=US&currencycode=USD

https://www.mouser.com/datasheet/2/308/1/MMBFJ202_D-2316065.pdf

So maybe you are right.  I'll try rigging something up with wires tonight to switch the drain and source pins and see if it works

[GGBB]

Also - it doesn't look like you've adjusted any of the trim pots - they are all set to minimum (or maximum). You need to adjust those until you have the correct voltages or thereabouts according to what's posted on the ROG page. Your drains look right, but sources are too low - does adjusting the trimpots help that?

[freshmex18]

I have adjusted those trimpots to get the drain voltages as close to 4.5V as I can.  It is barely a nudge to get it to drop from 9V down to ~4.5V.  The source voltages do vary if I adjust the trimpots but none higher than .13 and that is if I adjust the trimpot completely down (bringing the drain voltages to max) so I don't know what is going on. 

[freshmex18]

I used some wires to switch the drain and gate inputs and nothing has changed.
The new drain still reads as 4.42 and the new source is still 0.10 (same as what it read before).  And if I turn the trimpot the entire way down (which brings the drain up to 8.73) the most the source will read is 0.70. 

[rankot]

Voltage on an JFET should be (with grounded input):

G 0V
D 4.5V
S 1.2V

Or similar. What is suspicious is that you have close to 0V at source, which indicates the possibility that your adapters are WRONG. Make sure they have correct pin order. If you have a transistor tester, it should be easy, if not use your multimetar set to diode range and measure GD and GS. If they differ more than few %, then pinout is not good.

If adapters are not good, then solder excess resistor or capacitor leads to SMD JFET and convert it to TTH that way.

[freshmex18]

The adapters have the drain and the source reversed from these specific J201s as GGBB pointed out.  I have already reversed the pins and nothing has changed.  As the readings are the same, it seems that drain and source are interchangeable for these specific J201s

[rankot]

Try without adapters, solder leads to JFET.

To me, it seems that gate is reversed with source or drain, thus you get 0V on source.

Layout is made expecting JFET use DSG pinout. So check your datasheet for SMD parts, and if their pinout is like this, solder leads like shown and simply put into your circuit. Or just check with MM if your adapters are like this.

[freshmex18]

I do not understand why you are thinking the gate is in the wrong location.  These are the ones i bought

https://www.mouser.com/datasheet/2/308/1/MMBFJ202_D-2316065.pdf

The gate is clearly at the top which is where these adapter boards have the gate.  It's the source and drain that are in the reverse location, not the gate

[freshmex18]

Readings with MM for J201

Top pin to lower left  1.837k   
Top pin to lower right 1.823k
Lower left to lower right .585k

[anotherjim]

The gate is effectively the anode of a diode to the channel, either end of which is the cathode. Test lead polarity, therefore, matters when testing from the gate. Polarity won't matter when testing between source and drain as they are just the ends of the channel. A JFET channel is normally conductive, only when the gate voltage is made negative (or less positive) compared to the channel voltage does the channel resistance rise.
It's better to use the Diode test of the meter than resistance although that's assuming your DMM has it. It will show the forward voltage drop of the gate diode in millivolts. It will read as a normal silicon diode when the red lead is on the gate and the black lead is on either source or drain (those two really are interchangeable and you should check both). 
It's always better to test out of the circuit and if you have to do it in the circuit, definitely with the power off.

[freshmex18]

Diode Test

Top (red) Bottom Left (black) 0.740V
Top (black) Bottom Left (red) no reading
Top (red) Bottom Right (black) 0.736V
Top (black) Bottom Right (red) no reading
Bottom Left (black) Bottom Right (red) 0.293V
Bottom Left (red) Bottom Right (black)0.315V

[GGBB]

Can you use an audio probe to figure out where in the circuit the signal dies?

[rankot]

I do not understand why you are thinking the gate is in the wrong location.  These are the ones i bought

https://www.mouser.com/datasheet/2/308/1/MMBFJ202_D-2316065.pdf

The gate is clearly at the top which is where these adapter boards have the gate.  It's the source and drain that are in the reverse location, not the gate

We don't think the gate is in the wrong location! I (and maybe others) think that your adapters are not good! I wrote you that. And your MM readings (diode test) just confirm that transistor itself is good (as shown on my image from datasheet). Now do the same test on adapter pins where you soldered transistor, put black probe on third pin and check if red on pins 1 and 2 measure aroun 0.74V. If not, adapter sucks.

[freshmex18]

with an audio probe, the last place I have signal is the leg of C4, the 250p cap going into the treble pot.

[freshmex18]

Ah, ok.  I misunderstood what you were saying before.  I thought the issue was the j201 itself, not the pins coming out of the adapter board. 

Diode test on the pins shows 0.753V when the red is on the gate and black is on the source but no reading when the red is on the gate and black is on the drain

[rankot]

with an audio probe, the last place I have signal is the leg of C4, the 250p cap going into the treble pot.

You have the signal before the cap, or after it? Is it stronger after Q2 or before it?

When measuring JFET, put red probe on gate, black probes on drain or source. Try to measure pins on JFET directly, gate should be the lonely one, drain and source are a pair on the opposite side. If you confirm measurement, then measure pins on the adapter. The gate should be the rightmost pin, left and middle are drain and source. If it doesn't measure as expected there, then adapter has the wrong pinout. If it measure good, then we can say adapter is good as well and discard that as the source of trouble.

If I understood well those readings:
Top (red) Bottom Left (black) 0.740V
Top (red) Bottom Right (black) 0.736V
it seems JFETs are OK. So measure adapter pins now and confirm they measure as expected.

[freshmex18]

I have signal when I put the probe onto the leg of the 250p cap that then goes into the treble pot. (Hole 21,E on the vero layout)

The signal is stronger out of Q1 than Q2

When I wrote "Top (red) Bottom Left (black) 0.740V, Top (red) Bottom Right (black) 0.736V" I was indicating the terminals/pins/leads whatever you call the metal things sticking out of the j201 itself when looking at it with the side with two pins (rain and source) facing down and the side with one pin (gate) facing up.

I did measure the pins exiting the adapter board themselves, which I indicated with "Diode test on the pins shows 0.753V when the red is on the gate and black is on the source but no reading when the red is on the gate and black is on the drain"  Gate is the rightmost pin.  Source is the middle pin.  Drain is the leftmost pin.  As i stated, I get a reading of "0.753V when the red is on the gate and black is on the source but no reading when the red is on the gate and black is on the drain."  I also get no reading when I reverse the read and black probes from the MM

[anotherjim]

I'm happy with the JFET test. You now know how to identify the gate pin. That's a win 
I saw mention of a whining noise. It could be oscillating. There are x4 inverting stages so the circuit is non-inverting overall. If there is any coupling between input and output then you have a positive feedback loop. The coupling doesn't have to be a short circuit but radiated from output wires to input wires. Even the switch groups of the stompswitch can have enough coupling to cause feedback.
The bias setting problem could be due to the whine waveform which reading on DC will cause the DMM to show a false value.
An easy check for feedback is to temporarily ground the PCB input. The whine should stop and you have only circuit hiss that will change if you play with the controls and you can recheck the bias trimmers for drain and source voltage.