Harmonic Energizer clone

[soggybag]

I built a clone of the Systech Harmonic Energizer. It works and does what's supposed to do but I'm getting some distortion. It sounds like op-amp distortion, the bad kind.

Here's the schematic. I'm wondering if the input signal is too hot and that's overdriving the rest of the circuit? I used 10K for R2 (Q1 Source.) Would increasing this lower the gain of Q1?

[soggybag]

Here's a couple pictures. I've been getting PCBs fabbed at PCBWay.com the service is very cheap. I did this one for the Harmonic Energizer.

[Rob Strand]

It could be Q1 you can try wiring the R1 to Vcc/2 instead of ground.   That might bias the JFET more favorably.  Check the voltage on the source when R1 connected to ground and when connected to Vcc/2.

[Mark Hammer]

I've made a couple of those, and not experienced any clipping other than what I've intended (I use a 250k gain pot and diode pair in the feedback loop. A spdt toggle is used to either lift the diodes and bridge the pot with a resistor, or lift that resistor and connect the diodes.) The madbean schematic shows a 22k source resistance on the input FET.

[Keppy]

I used 10K for R2 (Q1 Source.) Would increasing this lower the gain of Q1?

No. The J201 is just a buffer, not a gain stage, so changing resistors might change the bias point but will not change the gain. Check the voltage on Q1 source. If it's between 3-6v it's probably fine, otherwise you should try the suggestions posted by Mark and Rob.

C9 is backwards on the schematic.

You might just be overdriving the output stage. Having a gain control there with no clipping diodes, followed by a passive volume control, is just begging for opamp clipping if the gain is high and the volume is low. What does it sound like if you leave the volume full up and only use the gain control to set your volume?

[antonis]

Also, R1 is of uselessly high value, 'cause input impedance is dominated by 1M pull-down resistor (R17)
(it could result into "significant" Gate bias offset at elevated temperatures..)
I'd exchange R1 & R17 and make C1 10nF..

Follow what said above about J201 bias and/or make R2 at least half of its present value..
As it is, Q1 Emitter can't go all down to 0V (actually, not lower than about 2.8V) for signal negative waveform..
So, for an input signal of amplitude slightly higher than V_Emitter - 2.8V, Q1 inevitably distorts..

Just for checking purpose, put a 1M pot in place of R4, with lug 3 wired on R4 left (outer) pad, wiper on R4 right (inner) pad and lug 1 on GND..
It will serve for signal attenuation purpose, to verify if it's input amplitude issue..

[Mark Hammer]

I used 10K for R2 (Q1 Source.) Would increasing this lower the gain of Q1?

No. The J201 is just a buffer, not a gain stage, so changing resistors might change the bias point but will not change the gain. Check the voltage on Q1 source. If it's between 3-6v it's probably fine, otherwise you should try the suggestions posted by Mark and Rob.

C9 is backwards on the schematic.

You might just be overdriving the output stage. Having a gain control there with no clipping diodes, followed by a passive volume control, is just begging for opamp clipping if the gain is high and the volume is low. What does it sound like if you leave the volume full up and only use the gain control to set your volume?

That's sort of why I stuck clipping diodes in the feedback loop.  It holds output level to a maximum, such that a volume control is not needed.  One *could* stick clipping diodes on the output, a la Distortion+, but feedback-loop placement makes switching between clipping and nonclipping modes much easier and simpler.

[soggybag]

Thanks for the all f the help.

I measured 0.6v at source of Q1. I figure this is where most of my problem is coming from.

I took a look at the Madbean Karate Shop schematic. This used a MPF102 with a 22K source resistor. I Replaced My J201 with an MPF102 and wired a 100k pot for the source resistor. With the pot all the way up I got 3.4v at source of Q1.

Put the MPF102 in with a 160K resistor that I found on my desk and it sounds a lot better.

I still get a little clipping if I turn the gain above 50% and hit all the strings hard.

I'm going to give the Marks gain pot and diodes mod later. This will take a little more work.

[soggybag]

I double checked C9s orientation against a couple schematics and I have it the same in my schematic. It does look wrong.

Why would this work? Seems like the potential at 14 would be lower than ground? Or is there some strange interaction with C8 here that makes this work?

[Rob Strand]

Why would this work? Seems like the potential at 14 would be lower than ground? Or is there some strange interaction with C8 here that makes this work?

Reversed caps can work provided the circuit doesn't care about leakage (I mean DC leakage current).      If the voltage across the cap is less than 1V then it might stay OK forever.  If the DC voltage across the cap is higher than 1V after a while the capacitor can de-plate and the leakage goes up.   In a recent post anotherjim mentioned the caps can re-plate in reverse.  That's means it might fix itself but there could be a long period of bad behaviour in between.  (BTW, I haven't tried the reverse plating experiment.)

Put the MPF102 in with a 160K resistor that I found on my desk and it sounds a lot better.

160k isn't a great solution since the drain current is very low and that will push the output impedance of the buffer up.
If you use the J201 with the gate resistor wired back to Vcc/2 (Vref), and with the original source resistor, the output impedance be much lower.

[cspar]

Mark's mod as usual sounds like the way to go but I'd also make sure that you have the outside foils of all your film caps oriented correctly.

Things can get pretty noise ridden if you don't take that step. The more filtering and gain the worse it can get and this circuit looks like one where it's necessary for a good response.

[antonis]

@cspar: Just wait to take care of input issues..

An input buffer biased at 600mV with a relatively high value Source resistor doesn't give the slightest damn about succeding stage potential non-linearity, believe me..

[soggybag]

The cap is easy to fix. Every schematic I've seen shows this orientation. Either all of those schematics are wrong or something else is going on?

I'll try it the other way around and see what happens.

Would a smaller cap work here? Something in the range of 1u to 2u? I think I might have some film or ceramic caps in that range I could sub and the orientation wouldn't be an issue.

I'll give the R1 to Vcc/2 a try. To do that I'll have to run a jumper.

I'm building a second and I'm going to try out Marks ideas with the clipping diodes across the gain pot.

[anotherjim]

I would also give Vcc/2 bias for Q1 a go. If it's a voltage follower and you bias it to 0v, what can you expect out of it? It can be ok with weak raw guitar output but when you have a divider available it's worth trying bias from it.

[soggybag]

I used a 2M2 resistor for R1 and ran it to Vcc/2 and Q1 source measured 4.8V.

Thanks Rob that worked well!

Still working on some of the other suggestions...

[PRR]

... Either all of those schematics are wrong or ...

That's my interpretation. Bad drawing.

Also agree that a J201 in front either needs a very weak pluck or several Volts of Gate bias.

Is it in your hand powered? Read the DC to ground on both ends of the cap and see which way the "+" really wants to go. If it looks wrong, take it out and check again. (DC conditions usually don't change when you take out a cap.)

[antonis]

On the other hand, you can get rid of Q1 ans assosiated circuitry, oversize R3, R5, R6, R13 & BAND pot X10 (or so), undersize C2 & C4 by the same amount and forget about input issues..
(provided that noise isn't your main concern..)

[soggybag]

... Either all of those schematics are wrong or ...

That's my interpretation. Bad drawing.

Also agree that a J201 in front either needs a very weak pluck or several Volts of Gate bias.

Is it in your hand powered? Read the DC to ground on both ends of the cap and see which way the "+" really wants to go. If it looks wrong, take it out and check again. (DC conditions usually don't change when you take out a cap.)

I measured -2.78v across C9. That's with the positive (red) probe at the positive terminal of C9 and the negative (black) probe at the negative terminal of C9. Maybe this is backwards. I wonder why all of the schematics show this the same way? I looked at three schematics and they all show this cap oriented the same.

[antonis]

I wonder why all of the schematics show this the same way? I looked at three schematics and they all show this cap oriented the same.

Maybe 'cause all schematics are copy-paste..??

Just by common sense implementation, IC1_D OUT (pin 14) should exhibit 4.5VDC (Vref) on C9 upper leg..
(same stands for C8 left leg..)
Both C8 & C9 legs common point faces to GND, hence these legs should be negative (-)..
The only case for C9 been correctly oriented as it is should be for C8 negative leg exhibiting a DC voltage greater than +4.5V..
(which clearly isn't the case here..)

[PRR]

...I looked at three schematics ...

Yet you did not read my one post.

Read the DC to ground on both ends of the cap ...

It is very easy to be mixed-up which end is which. That may be why we are wondering who is wrong. To ground with a clear notion which end is which *may* be the most comprehensible (or maybe not).