MXR Noise gate

[TomVyborny]

Hi guys!
I've been working on my MXR Noise gate clone recently, but I found one issue and can't figure it out by myself. The Noise gate works, except that the last op amp U4.1 doesn't do his job. When the Bias A voltage is aplied, the bias voltage apears on both the pin 5 and 6 so then it doesnt do his job. When the bias voltage isn't aplied, then there is signal coming out of it. I added those improved active bias generator with 2 op amps. I tried to remove them so the bias voltage was taken from the resistor voltage divider but with no change. I would really apreciate your help. Thank you very much.

[ElectricDruid]

U4.1 isn't right. You'Ve got the signal going into the -ve input, but for a buffer, you should have it to +ve. You'll need a resistor from the +ve input to your bias voltage too. Check your schematic against other examples.

Why such complicated bias? You've got two different bias supplies, and both of them are *double* buffered?!? Surely that's not required?

[TomVyborny]

Yeah, It did seem to me strange to but the source schematics says so. That thing with bias generators was that I wanted to come up with lower noise bias source than just regular voltage divider.

[Mark Hammer]

I think the pin numbers are simply wrong.  What is labelled as pin 6 should be pin 5.   Look at the other op-amp in the b&w schematic and you'll see the input goes to the non-inverting (+) pin.  That last stage, IC1.2 in the b&w drawing (U4.1 in your drawing) is intended to be a unity-gain non-inverting buffer.  Connect the incoming signal to the non-inverting pin 6, and connect the output pin to the inverting pin (pin 5) and that's what it becomes.

It's not always true, but in most instances, and certainly in 8-pin dual op-amps, the inverting pin is the one closest to the output pin.  So 3-2-1 = + / - / out, and 5-6-7 = + / - / out.

[ElectricDruid]

Yeah, It did seem to me strange to but the source schematics says so.

Not your error then, but still an error. Unless this is some weird new op-amp arrangement that someone's just invented and I've never seen before.

That thing with bias generators was that I wanted to come up with lower noise bias source than just regular voltage divider.

Does that *really* help lower the noise? How?
My usual rule of thumb is that "less parts are quieter than more". It's not anything like always true, but it makes you consider *why* you're adding something and whether there's really any actual benefit, and for that reason I keep the rule around, despite the not-always-true-ness!
There are situations where buffering the bias supply like that would probably help (particularly where the currents being taken from the bias are large - the op-amp will then provide a bigger drive) but I don't see that being the case here. It's only used as a reference voltage via large-value resistors in a half-dozen places.

[ElectricDruid]

I think the pin numbers are simply wrong.  What is labelled as pin 6 should be pin 5.   Look at the other op-amp in the b&w schematic and you'll see the input goes to the non-inverting (+) pin.  That last stage, IC1.2 in the b&w drawing (U4.1 in your drawing) is intended to be a unity-gain non-inverting buffer.  Connect the incoming signal to the non-inverting pin 6, and connect the output pin to the inverting pin (pin 5) and that's what it becomes.

It's not always true, but in most instances, and certainly in 8-pin dual op-amps, the inverting pin is the one closest to the output pin.  So 3-2-1 = + / - / out, and 5-6-7 = + / - / out.

Sorry Mark, I don't agree. IC1.2: Pin5 is +ve, Pin 6 is -ve, pin 7 is output, and that's right, like you said. What's not right is C10 going to the -ve input, the one with the feedback on it. I think the drawing's wrong, not the pin numbering.

Anyway, whatever's going on, it's pretty clear that that PedalPCB schematic is what's at fault. We're trying to guess what it *should* look like, which is always a fun game...

[Rob Strand]

You might want to check out this thread, where I retraced the MXR Noise Gate and fixed the schematic.
(Pretty much all schematics on the web don't match the original.)

https://www.diystompboxes.com/smfforum/index.php?topic=122689.0

Linked to that thread was long thread which highlights a number of issues which arise with this circuit.

[ElectricDruid]

Lordy, that thread's a goldmine, Rob. There's not just a few things wrong with the basic schematic - the whole thing is riddled with errors! Nice work.

[Rob Strand]

Yes, a bit of a eye opener.

Here's the thread will some gory details of build issues.  The good stuff is
at the end of the thread.  (I thought that was linked to the schematic thread
but it was the other way around.)
https://www.diystompboxes.com/smfforum/index.php?topic=122682.0

[Mark Hammer]

I think the pin numbers are simply wrong.  What is labelled as pin 6 should be pin 5.   Look at the other op-amp in the b&w schematic and you'll see the input goes to the non-inverting (+) pin.  That last stage, IC1.2 in the b&w drawing (U4.1 in your drawing) is intended to be a unity-gain non-inverting buffer.  Connect the incoming signal to the non-inverting pin 6, and connect the output pin to the inverting pin (pin 5) and that's what it becomes.

It's not always true, but in most instances, and certainly in 8-pin dual op-amps, the inverting pin is the one closest to the output pin.  So 3-2-1 = + / - / out, and 5-6-7 = + / - / out.

Sorry Mark, I don't agree. IC1.2: Pin5 is +ve, Pin 6 is -ve, pin 7 is output, and that's right, like you said. What's not right is C10 going to the -ve input, the one with the feedback on it. I think the drawing's wrong, not the pin numbering.

Anyway, whatever's going on, it's pretty clear that that PedalPCB schematic is what's at fault. We're trying to guess what it *should* look like, which is always a fun game...

Note to self: Don't try to "help" when you're supposed to be getting ready to go out for dinner with the family.

[PRR]

Parallel thread:
https://www.diyaudio.com/community/threads/mxr-based-noise-gate.391277/

[TomVyborny]

Well, thank you so much for your respones. I guess that I will just the output buffer the regular way. The effect works when i bypass the output op amp so I guess that it should be fine. All the schematics had the op amp connected this weird way, but I have really no idea how could that ever worked.

[Rob Strand]

Well, thank you so much for your respones. I guess that I will just the output buffer the regular way. The effect works when i bypass the output op amp so I guess that it should be fine. All the schematics had the op amp connected this weird way, but I have really no idea how could that ever worked.

The 47n + 100k + 2x1MEG on the JFET gate are all to linearize the JFET (ie. lower distortion).   Phasers use a couple of other configurations but the buffer method is usually better.

The 10n + 2x1MEG going to pin 2 are just a VREF=Vcc/2 circuit.  Not uncommon but different to the three resistor + cap method of generating Vcc/2.
   

[Fender3D]

If you follow the 1st schematic posted it simply can't work 'cause no signal enters U4.1
It should receive signal from the C7-C8 junction, then FET and C8 short signal to ground, killing it. of course it must receive signal on pin 5

Does that *really* help lower the noise? How?

It may help lowering the crosstalk you may got when using dual op-amp instead of 2 singles and high gain involved

[TomVyborny]

Ok so now I found a very strange thing. The pins 5 and 6 at the output amp are shorted, but only when the voltage to the circuit is connected and the op amp is inserted, the short isn't in the socket.

[idy]

You can't use the continuity test, or the ohms setting, on a circuit that is powered up. Results will be crazy.

[Rob Strand]

Ok so now I found a very strange thing. The pins 5 and 6 at the output amp are shorted, but only when the voltage to the circuit is connected and the op amp is inserted, the short isn't in the socket.

You shouldn't use a continuity tester on powered circuits.   They are not designed to be used in that way.    You can get continuity when there is no real continuity because the circuit feeds voltage into the meter and confuses the measurement.

I can see how it might measure short in-circuit:
- without power pin 6 connects to a cap and the meter sees the connection as open. 
- when the circuit is powered with the opamp in place the opamp makes pin 6 and pin 5 equal like a short. That's how opamps work when feedback is present.

[TomVyborny]

OK, thanks I didn't know that.

[bamslam69]

Yet another clown attempting this circuit. Going off the circuit on the tag board affects site.

After no luck with the circuit after a day of failed fault finding, I'm down to either rebuilding it on a test board, or just buying one.

What is it with that site and not supplying a schematic? (Copyright I guess)

[percyhornickel]

Hi everyone, I build this circuit a few months ago and I would like to write some tips that worked the best (for me at least):

JFET: 2N5458 - Works very well (Vp=-2.5V) / 2N5457 worked too.

Zener Diode: I put a switch to choose between 4.7V and 5.6V, 1/4W both (more agresive o soft cut).

Resistor 150K: changed for a B1M potentiometer, this helps a lot with the decay at the end ("release" on the tonepad´s schematic).

Sensitivity: B500K

I am really happy with my circuit, it works very nice this way.


Saludos from Venezuela

Percy