AMZ Mini Booster/Mu Amp Bias Control

[redbagy]

Hi, I'm fairly new to the AMZ Mini Booser (which uses a Mu Amp configuration). I've read that some include a bias control to be able to control the gain of this configuration and control the amount of gain/grit this circuit would output. Can someone provide schematics/more information about this please?

[Vivek]

Jack AMZ made the muAmp taking inspiration from a note and schematic in a National semiconductor Audio Handbook

They used FET to try and replicate a similar circuit that used to be implemented earlier with tubes.

The uAmp needs to feed a stage with very high input impedance, else the gain reduces.

In my SPICE analysis, the gain of one uAmp stage was about 60,

And that would rail saturate along with non linearities of FET transfer curve.

It is self biasing

I don't know what to change if one wants higher or lower gain

And I don't know why uAmp should sound any different than an Opamp stage that is designed to have same transfer function

[antonis]

All time classic R.G. : http://www.geofex.com/Article_Folders/modmuamp/modmuamp.htm

[Steben]

And I don't know why uAmp should sound any different than an Opamp stage that is designed to have same transfer function

An opamp stage does not have the residual even order harmonics a muamp has. It is perhaps unimportant but they are present.
A low gain BJT stage followed by a (opamp) clipping stage might do the trick.

[amptramp]

All time classic R.G. : http://www.geofex.com/Article_Folders/modmuamp/modmuamp.htm

Interfet now has various current regulator diodes which are JFET's with the gate shorted to the source internally.  You can get current values from 240 µA to 1.8 mA in a 2-pin TO-92 package.  There used to be current regulator diodes in glass diode packaging and I have used them but I do not know if they are in production anymore.

You should note that while the first two schematics in the geofex article are µAmp designs, the third is an SRPP design that looks similar but acts very differently.  The upper transistor gets its bias from the lower end of the lower transistor's drain resistor so when the lower transistor conducts, the upper transistor is driven further into cutoff and when the lower transistor current is reduced, the upper transistor current increases due to the reduced bias.  With SRPP as well as µ amp, the current in the upper and lower transistor are different so they should not be regarded as voltage amplifiers because without a load, their output will hit the rails and the higher impedance you have in the load, the more of this effect you get.  If the currents in the upper and lower transistor are different, the difference current has to go somewhere because the FET's are in series and that somewhere is the load.

You could make a nice distortion with a µ amp or SRPP stage by having a variable input impedance in the following stage.  Low resistance gives you linear operation and high resistance gives you distortion.

[Vivek]

BSIAB 2 Analysis in SPICE
https://www.diystompboxes.com/smfforum/index.php?topic=127101.0

[redbagy]

Hi Vivek! Thanks for this simulation and apologies for the late reply.

Two questions if I may:

• R3 is generally 1K. What is the effect of increasing/decreasing this value? Would it change the bias/gain of this stage?
• What is the effect of C3? Does it provide an increase in gain for HF only like other configurations? Some vero builds do not include this and I was curious about it.

Thanks!

[PRR]

> inspiration from a note and schematic in a National semiconductor Audio Handbook

For the record... the National mu-Amp first appeared in a FET Applications Note, AN-32, and TI still archives it!!
FET Circuit Applications, National Semiconductor Application Note 32,  February 1970  300kb PDF, TI file-number snoa620

From the time when National was making a lot of JFETs more than chips. To my knowledge (the app-note was presented in EE class) this was several years before the Audio Handbook. I do not see it in my reprint of the 1980 Audio book?

[redbagy]

Hi! So I ended simulating and building the circuit and ended up with the following results:

• I omitted the 10uF capacitor since I was going more for a clean-ish boost rather than a break up/distorted boost. At least with the 10uF I felt that the signal was mostly distorted all the time.
• In series with the 1kOhm I placed a 50kOhm potentiometer to be able to change the gain of the circuit.

Pretty happy with the results to be honest.

[antonis]

Are you sure about 50k pot value..??

[Clint Eastwood]

An elegant way to control gain is to put a large value (500k?) pot wired as varable resistor in series with C2.

[redbagy]

@clint Will check this out, thanks! Any noticeable difference to changing the resistor at the source instead?
@antonis What about it? Do you recommend a different value? 25k worked as well but 50k felt like a smoother control.

[m4268588]

Gain depends on the device used. "x60" is just one example.


Top FETs, Lambda parameters greatly significant affect gain factor.
I don't know the basis for calculating Lambda (or voltage of early effect in BJT).
Read graph plots in the datasheet?

By increasing the load resistance, Gain change due to the resistance in series with C2 be increased.


"source varable resistor"
No crackling?

[redbagy]

@m4268588 No I did not notice any crackling hmmm. I'm now inclined to change my configuration to a gain pot in series with C2. What value would you recommend?
I'm still curious as to why this would be better as opposed to a variable source resistor (if someone can explain this perhaps?)

[antonis]

I'm now inclined to change my configuration to a gain pot in series with C2.
I'm still curious as to why this would be better as opposed to a variable source resistor (if someone can explain this perhaps?)

Because it keeps Source resistor value unaltered, for DC purposes (bias) while it's set in parallel with it, altering equivalent resistance for AC purposes (gain)..

[Steben]

I'm now inclined to change my configuration to a gain pot in series with C2.
I'm still curious as to why this would be better as opposed to a variable source resistor (if someone can explain this perhaps?)

Because it keeps Source resistor value unaltered, for DC purposes (bias) while it's set in parallel with it, altering equivalent resistance for AC purposes (gain)..

variable source does not alter DC if the mid lug is connected to a capacitor. Fuzz face style.

[antonis]

variable source does not alter DC if the mid lug is connected to a capacitor. Fuzz face style.

True & Correct..

I just answered to @redbagy particular configuration question..

P.S.
Here, we are talking for a Source resistor paralleled pot of x50 to x100 resistor's value for "smooth" gain setting..
This kind of R_Source // Pot "taper" can't be obtained with a single pot..

[Clint Eastwood]

I'm still curious as to why this would be better as opposed to a variable source resistor (if someone can explain this perhaps?)

I won't say it's better, but it is different. With a 1meg pot in series with C2 you can vary the gain between about 1.5 times and very high gain, the range is quite wide. Also, with your method, because you change the source resistance, you vary the current through the muamp, and this varies the output impedance. But this is not neccesarily bad.

[redbagy]

Hi again and thank you for your help and input with this. I am using a 500k pot anti-log in series with C2 and it's working better without any crackle now. Thanks again

[m4268588]

Also, with your method, because you change the source resistance, you vary the current through the muamp, and this varies the output impedance.

With C2 series pot that doesn't happen?