Choosing resistor values for JFET audio switch

[PRR]

https://www.diystompboxes.com/smfforum/index.php?topic=126645.0

[Dormammu]

I checked my schematic — it's got p-channel jfets.
Work fine without almost any other tying parts.
Something like that.


It is not exact schematic, just diodes\jfets configuration.

[jsoto]

I have learned how to use LTspice and have been doing a few simulations. Here is a table with my results:





Some remarks regarding these results first:

• Vpp (ON) and Vpp (OFF) are the voltages (peak-to-peak) read when the source V1 = 5V and V1 = 0V (respectively) and are measured at the node between R5 and R8 (R8 is just a load resistor).
• All attenuation values obtained when R11 and R12 are not connected ("-" in the table) correspond to measurements taken after 50 seconds from power-up. When R11 and R12 are connected (regardless of their value), the attenuation value is constant from power-up, but when they are removed, Vpp (OFF) decreases progressively (perhaps due to the coupling capacitor C1?). Where Vpp (OFF) is 40nV after 50 seconds, for example, I have found that it decreases to 16nV after 100s and to 6nV after 200s.
• In some cases, Vpp (OFF) is not centered around 0V and has a slight (in some cases quite significant) offset towards negative values, but I have only noted the p-p values.
• The attenuation values are not realistic, but I guess that the attenuation differences between experiments are somewhat realistic and useful.
  
• The bleedthrough signal is very clean when leaving R11 and R12 connected, but quite distorted when disconnecting them. The distortion seems to change as time moves forward from power up (first screenshot at 50s and second at 200s):

I think there is quite a bit of useful information in this table. The first thing I noticed is that using 10k for R11 and R12 to scale the signal by half increases the bleedthrough by quite a bit. This problem can be mitigated by using higher values of C5 and can be completely solved by using a voltage soure for Vref instead of using a voltage divider. Why could this happen?

The results also show that increasing Vref by one volt does not have a significant impact on attenuation. What seems very important is to use a JFET with very low Vgs(off). Using 10k for R11 and R12 also improves (when using a voltage source) the attenuation, but not by 12dB as expected...

I will do more breadboard testing to validate these results.

[FSFX]

I checked my schematic — it's got p-channel jfets.
Work fine without almost any other tying parts.
Something like that.


It is not exact schematic, just diodes\jfets configuration.

What about the reference voltage for the JFET switching? Your circuit is incomplete.

[m4268588]

This problem can be mitigated by using higher values of C5 and can be completely solved by using a voltage soure for Vref instead of using a voltage divider. Why could this happen?

If R11 is small, they embezzle many from the signal source. small C5 can't eat it all, so U2 eats the rest. The voltage Source is a gluttonous and does not give it to others.

I will point out again that +5V at SW_ON is incorrect. P-P 4V cannot pass. After the bleeding solved.

[Dormammu]

I checked my schematic — it's got p-channel jfets.
Work fine without almost any other tying parts.
Something like that.


It is not exact schematic, just diodes\jfets configuration.

What about the reference voltage for the JFET switching? Your circuit is incomplete.

I still don't really understand what TS wants to achieve.  My scheme is just a signal switch.  The gates of p-channel Jfets are controlled by IC D-trigger. Control voltage 0v — signal coming, +9v — no signal.
I think the mechanical switch control will also work the same.
Whether will work in such a scheme n-channel jfet — I do not know, never use them.

[jsoto]

I will point out again that +5V at SW_ON is incorrect. P-P 4V cannot pass.

I think the fact that the output voltage is somewhat lower than the input voltage (which by the way, although in my first post I said it was 4Vpp for simplicity, it is actually 3.7Vpp) has nothing to do with the 5V switch ON voltage, but rather with the Ron of the JFETs. In fact, both in LTspice and on the breadboard, if I use 9V to do the switching, the output voltage does not change.

I have run some tests on my breadboard and I observe that indeed, if I use a voltage divider for Vref and a larger capacitor, the bleedthrough decreases. I have replicated the voltage source by buffering the Vref voltage divider signal (although I don't know if this is a correct way to replicate a voltage source) and it has no noticeable effect. I have also noticed that only R11 has a real impact on the bleedthrough. No matter if I add or remove R12, whatever value it is, it does not increase or decrease the attenuation.

But I have made a rather surprising discovery. If, with Vref buffered, I connect R11 before C1 (instead of after C1 as in the LTspice schematic) the attenuation increases a lot, making the bleedthrough almost imperceptible! It doesn't make much sense to me, could someone explain what is going on?

[m4268588]

I think the fact that the output voltage is somewhat lower than the input voltage (which by the way, although in my first post I said it was 4Vpp for simplicity, it is actually 3.7Vpp) has nothing to do with the 5V switch ON voltage, but rather with the Ron of the JFETs. In fact, both in LTspice and on the breadboard, if I use 9V to do the switching, the output voltage does not change.

That's fine.
I overlooked that it was inverted input. Sorry.

connect R11 before C1

GND is a better choice than Vref. What if don't buffer Vref?

[jsoto]

GND is a better choice than Vref. What if don't buffer Vref?

Connecting R11 to GND before C1 helps a bit (I would say about 6dB) but connecting it to 4.5V has a huge impact. If Vref is not buffered, the bleedthrough increases instead of decreasing, weird...

[merlinb]

But I have made a rather surprising discovery. If, with Vref buffered, I connect R11 before C1 (instead of after C1 as in the LTspice schematic) the attenuation increases a lot, making the bleedthrough almost imperceptible! It doesn't make much sense to me, could someone explain what is going on?

Is R11 1Meg? I wouldn't expect it to have any significant effect either way 

[jsoto]

Is R11 1Meg? I wouldn't expect it to have any significant effect either way

Sorry, I wasn't very clear, R11 was 10k. I tried all possible combinations, here are the results:

	To GND	To 4.5V NOT buffered	To 4.5V buffered
R11=10k before C1	Roughly +6dB attenuation, as expected (HF)	Huge increase in bleedthrough (LF)	Significant improvement in attenuation (LF)
R11=1M before C1	No changes (HF)	Some increase in bleedthrough (HF+LF)	No changes (HF)
R11=10k after C1	-	Huge increase in bleedthrough (LF)	Huge increase in bleedthrough (HF)
R11=1M after C1	-	Some increase in bleedthrough (HF+LF)	No changes (HF)

* R11 and C1 refer to the LTspice schematic, not to the first schematics I provided at the beginning of the thread.

The bleedthrough doesn't sound exactly the same as the unmuted signal, so I have included what kind of response I can hear in each case, LF meaning low frequencies (as if the signal was going through an LPF) and HF meaning high frequencies (as if the signal was going through an LPF).

I must admit that I'm quite lost at this point...