Any info on the Gallien Krueger G.I.V.E. (gate induced valve effect)?

[Umlaut]

I was browsing through some GK schematics and manuals and I saw this term mentioned in a few of them, however, the info on it is exasperatingly vague. Couldn't find much else on the net either. I'm assuming it is JUST a marketing spiel for the jfet stage depicted below, but I want to make sure in case I am missing something here.

Looking at all the schems that I have for the amps that feature the GIVE, the common element is a bipolar voltage powered jfet stage not too far removed from the Fetzer valve or the 1st gen Fender Harvard.
In some iterations, V is +5/-15, in others, +15/-15 (the Diesel Dawg goes 9V/GND and biases to Vref). On the Backline 100, however, some Fets have their source to ground and are biased through a negative voltage/ground network.
Not the first time I see bipolar voltage for a jFet, but I'm still wondering... Ltspice sims did not yield anything out of the ordinary on all those configs.

What are the benefits of such biasing?
Why some later revisions of the same amp (2001RB) have +5V instead of +15V on drain? Is there any benefit to it besides reduced headroom and therefore earlier clipping?


Thanks in advance

[Rob Strand]

What are the benefits of such biasing?
Why some later revisions of the same amp (2001RB) have +5V instead of +15V on drain? Is there any benefit to it besides reduced headroom and therefore earlier clipping?

Do you have a link to the 5V version (I don't have my large stash of schematics here).

Connecting the source resistor to a large negative voltage is just a way of forcing a constant current through the JFET.   The source sits at some voltage specific to the JFET.  As an extreme example imagine the Vgs voltage between 1V to 5V depending on the type of JFET (or tolerance but a smaller range).  By connecting Rs to -15V  the voltage across the source resistor can only vary between 16V and 19V, which greatly reduces the spread of the bias current.   If you connected the source resistor to ground you would struggle to get it to bias correctly at all.    For the GK circuit 17V across 47k is 361uA,  and 361uA across 15K is 5.4V.   The 5.4V is equally well defined. So the buffer will bias to a fairly well defined source voltage.    I'm just giving you the idea my specific values might be off.   FWIW, the J113 models aren't so great on the web.

For the 5V version I suspect they keep a similar ratio of buffer bias voltage to supply voltage ratio, and that it just overloads earlier which requires less gain.   The 5V version will need JFETs with fairly low VP.

[Umlaut]

Thanks for the explanation! 

Schematic link:
https://elektrotanya.com/gallien-krueger_2001rb_sch.pdf/download.html

Snippet:



I remember reading about bipolar voltage for this jfet config to help mitigate the large spread in parameters, but I have to admit I'm still trying to wrap my head around it. Why add an extra two resistors, two capacitors and a zener to effectively reduce headroom? The spread should not be significant with such source current whether +5v or +15v to drain?

Then also, as mentioned, on the BL100:



Source is directly connected to ground, but gate seems to be at negative voltage. I fail to see why they wouldn't apply the same method as in the first example

[Rob Strand]

Schematic link:

Thanks.  So the 5V does make sense. 

In the supply 15V case the source resistor is 47k whereas in the 5V supply case the source resistor is 137k.    The drain current of the first JFET is lower in the 5V case by a factor of 47/137 = 1/2.9 ~ 1/3.   The drain resistor is kept at 15k in both cases but in the 5V case the voltage drop across the 15k with be 1/3rd that on the 15V case.  So the idea behind all that is to keep JFET drain voltage to supply voltage ratio the same in both designs.

remember reading about bipolar voltage for this jfet config to help mitigate the large spread in parameters, but I have to admit I'm still trying to wrap my head around it.

It's a very easy idea:   The drain current is determined by ID = (15V  + VGS) / Rsource; 15V from -15V rail.   VGS varies but by making 15V >> VGS the current is mostly determined by 15V and not by VGS.   The biasing therefore doesn't care much about the JFET parameters.

Why add an extra two resistors, two capacitors and a zener to effectively reduce headroom? The spread should not be significant with such source current whether +5v or +15v to drain

You mean for the +5V version?   The way I'm interpreting the +5V design is they want all the distortion to come from the JFET stage and not from the opamps in the stages before.  The 5V design will clip earlier and needs less swing from the opamps.   The opamps will operate with less gain and have a lot more clean headroom.

Source is directly connected to ground, but gate seems to be at negative voltage. I fail to see why they wouldn't apply the same method as in the first example

That design is an earlier design.  They have to manually adjust the JFET biasing on each unit with the trimpots.   That's because in this design the drain current is 100% determined by the specific JFET parameters.

In the later designs they learnt their lesson and modified the circuit to get rid of the trimpots.  (The negative voltage on the drain source is an old JFET amp design trick to work around parameter variation.)

In all designs the source of the first JFET is pinned to ground for AC signals:  hardwired for the old design and via the large source cap in the later designs.

[Umlaut]

Thanks a lot for the detailed explanation, it really helps! 

In the later designs they learnt their lesson and modified the circuit to get rid of the trimpots.  (The negative voltage on the drain is an old JFET amp design trick to work around parameter variation.)

Did you mean the source here?

The reason why I asked those questions in the first place is because I have scored an old Backline 100 for a very reasonable price which is on the way, and I want to know what makes it tick. I will probably breadboard the 2001 preamp this weekend, out of curiosity...
Thanks again!

[Rob Strand]

Did you mean the source here?

Yep sorry.

[teemuk]

G.I.V.E most prominently applies to 250ML/RL,  2000CPL, 2100SEL! Google should find circuit diagrams.

These don't employ the FET as usual common source gain stage but basically exploit its nonlinear impedance characteristic / variable current and use the FET as input in a transimpedance (op)amp.

Circuit can explain it better than I do. In schematic the employed device is a dual FET and shown as IC "box" so google datasheet and see how they are wired. Its basically two FET current regulators (one for negative, other for positive lobes of waveform) wired to input of opamp transimpedance amp. FET current is non-linear in respect to gate voltage hence "G.I.V.E".

[Umlaut]

Funny, I do not recall seeing the GIVE blurb on the manuals for that series.
I am quite acquainted with those schematics    A few years back I somewhat successfully breadboarded the 250ML using (i think) pairs of J201 in lieu of the GK0040-J412, for which I have never been able to find a datasheet to check for parameters. There is an older thread somewhere about pinout and such. Mind you, in those days I understood way less of how the circuit worked and did it in a paint-by-numbers manner. I could have accidentally gotten the LF353s to clip instead of the jfets when monkeying with the trimmers. I should do that again at some point. If anybody has that elusive datasheet, please share!
I do like the fact that they used small resistors between pins in the 2100SEL for (according to the sims) slight asymmetry...

[Rob Strand]

A few years back I somewhat successfully breadboarded the 250ML using (i think) pairs of J201 in lieu of the GK0040-J412, for which I have never been able to find a datasheet to check for parameters

If it's a dual JFET it could be a U412.   There's a whole heap of dual JFETs with part numbers U401 to U412 region (and beyond).

[Umlaut]

Thanks, Rob & Teemu. Well, if the U412 is a direct spec replacement for J412 (other than package), that would make its parameters extremely similar to J113, Gallien's favourite Jfet. Would make sense and I shouldn't be surprised