Is this even stable?

[fryingpan]

I'm trying my hand at discrete design and feedback.

It's a simple amp, three transistors, an npn into a pnp into an npn.



Power supply is 18V through a 100 ohm resistor, appropriately bypassed through a 220uF capacitor.

This is the AC response taken from the output, simulated:


 
The response seems to be smooth, even at minimum gain (set through the reverse log pot) although it is not Butterworth smooth, it's relatively flat (as simulated, just like a 0.1dB rise before the fall). What I don't understand is whether the amp is stable: at phase reversal the amp shows 4dB of gain. I don't understand if this is simply at the output or if this implies that the amp won't be stable because there will be more than unity gain in the feedback path at phase reversal.

(By the way, I don't understand why this works: feedback should be negative, but here, if I'm not mistaken, it's positive, since the signal injected into Q1's emitter from both Q2 and Q3 is in phase with the input. I tried reversing it but everything falls apart).

I tried adding a 30p cap between base and collector of Q2, and this is the result.



Is this better? Is it worse? Why is there that response rise in the high MHz (I expanded the graph to better show this "interesting" phenomenon)? Is it even truthful, considering that it is only a simulation and these transistors are rated only up to 100MHz or so?

According to Rod Elliott, CFB amps (which this is, essentially) are inherently stable, so am I worrying too much? (I don't have a 100MHz scope, I wouldn't be able to measure the amp if I built it). Am I even going in the right direction?

[antonis]

CFB amps (which this is, essentially) are inherently stable

True but the more close to 100% feedback (R11 close to zero ohms) the more stable the CFP configuration..

[fryingpan]

I said CFB (current feedback, not complementary feedback pair). But anyway, would it work?

[Rob Strand]

Stability is a tricky subject.  There's approximate ways to analyze it where the degree of approximation depends on the circuit.

You are looking at *closed* loop gain which is not what you are concerned with when analyzing feedback stability.   What you want is open loop gain, or simply loop gain.   That's what feedback sees and what causes oscillation.

Stability typically gets *worse* when the closed-loop gain is *low*.  So in your case that would be when the 5k pot is set to 5k.

Scan over the video (BTW there's a document link in the video) to see the issues.

Your circuit has two feedback paths via R11 and R7 which means you need to break the loop after those two components, say at the emitter of Q1.   Otherwise if you try to insert a "big inductor" or loop analysis device at the output you will get the wrong results since you have two output paths.

Also since the input impedance of Q1's emitter is comparable to the impedance of the feedback network driving the emitter, the circuit is subject to analysis errors unless both voltage and current feedback are considered (as per the evolution of analysis in the video).

A simpler but less accurate method, which works for flat response amplifiers, it to inject a square-wave at the input then look at the output.  If there is gross ringing the amplifier is likely to be unstable or does not have enough phase-margin.   You need a to use a small signal square-wave where the amplifier isn't clipping.

[PRR]

Rob is correct. It is probably stable.

The emitter follower (same device and similar current) will not add much phase shift. So it is a 2-stage loop. Unless you have been very clever, 2-stages will only peak-up, not oscillate.

And we don't see real peaking.

One of R7 or R11 is pointless.

How did R1 become 6.3K? Is that even a standard value? Dartboard? Over-stock special?

[Rob Strand]

One of R7 or R11 is pointless.

R7 vs R11 will have different characteristics.

Trying to remove R11 would mean Q2 would bias at low currents.
In this case perhaps change the R11 connection from R9 to ground.

R11 without R7:
- Easier to stabilize
  The feedback loop only involves two transistors and
  The load is isolated from the feedback point by the buffer.
BUT
- Having the buffer outside the loop means more distortion and a higher output impedance.

Feedback via R7:
- Harder to stabilize (not impossible as most power amps have this form)
  The load is inside of the feedback loop.
- Putting the buffer in the loop lowers distortion lower the output impedance.

It's generally a good idea to have the option to add a cb capacitor on Q2
to help stability.  It's not uncommon for these things to oscillate, depending
on supply bypassing,  and capacitive loading.

The source impedance feeding the base of Q1 can also affect stability.  Low
impedance helps but there's cases where you cannot control the source impedance
and in this case you need to make allowance for some source impedance when
considering stability (or overshoot in the step response).
Power amps tend to have RC filters at the input but preamps might not, and you
might not want or need it.

[fryingpan]

The double feedback path was borne out of expediency. It's the easiest way to decrease the gain at minimum gain without affecting maximum gain much. Of course, I could just attenuate the input, but this seemed more elegant. This way I can go from 12 to 35dB (instead of 22-36) at each extreme of the gain pot. 6.3k is an error, I misremembered the standard value 

[Rob Strand]

FYI:  I did a  loop-gain plot.  I didn't look very deeply at the design, or try to break the design.    Only enough to get some numbers.  Not did I move the Tian insertion point around to see if the results were the same.

I had to re-enter the Tian equations so I'm kind of using the simpler current injection method as a crude cross-check.  I put the current injection at Q1's collector since it is a current output.  This is far more accurate than a voltage injection method (similar to the Big Inductor method but better) at Q1's emitter, since as mentioned earlier Q1's emitter loads the feedback network.  You can see from the plot how the current injection method is a good approximation to the more accurate Tian method upto about 10MHz.

Here's a plot of the loop gain using the Tian method and a much simpler current injection method.



The phase-margin is pretty good with a compensation capacitance (added collector-base capacitance on Q2) of 1pF or 10pF.

[fryingpan]

OK, so.

Why does this circuit:



have such appalling drive? I did place a buffer after it.

This is the output open circuit:



And this crap is with a simple 3K resistor after it:

[antonis]

3k load forms a voltage divider with 7k5(R3) so output buffer can't go negative (lower to Emitter bias) more than Vout * 7k5 / (7k5 +3k)..

[fryingpan]

So the solution is to lower the emitter resistor? But I get "worse" characteristics when simulated, namely more high order harmonics produced close to clipping if R3 = 1k.

[antonis]

So the solution is to lower the emitter resistor?

Not necessarily but, for sure, raising Q1 Emitter bias voltage significantly..
(resulting into redesign the whole thing..)

P.S.
Is 3k actual load value or you're just playing..?

[fryingpan]

So the solution is to lower the emitter resistor?

Not necessarily but, for sure, raising Q1 Emitter bias voltage significantly..
(resulting into redesign the whole thing..)

P.S.
Is 3k actual load value or you're just playing..?

I'd like it to play good with 10kohm loads (line level, albeit consumer rather than professional). 3kohm was an example of a very low load.

[Rob Strand]

The problem is the 1k (R5) resistor on Q1's collector is too small.

Q2 is biased near cut-off.

The R5 value is critical for biasing in these designs.

(After fixing R5) You can get more low-side drive by adding a resistor to ground on Q2's collector.  You need to check.

FWIW, the DC bias point isn't biased for optimal swing.

[fryingpan]

The problem is the 1k (R5) resistor on Q1's collector is too small.

Q2 is biased near cut-off.

The R5 value is critical for biasing in these designs.

(After fixing R5) You can get more low-side drive by adding a resistor to ground on Q2's collector.  You need to check.

FWIW, the DC bias point isn't biased for optimal swing.

I know that Q3 is misbiased and that voltage swing is not optimised. This allows for some gradual moderate distortion, up to 4-5%, mostly 2nd harmonic, before it clips, it's on purpose - it's for a mild track saturator and as it is, at minimum gain, it can accomodate at least 22dB of headroom with respect to a -10dBV level (and distorsion increases quite smoothly, 0.1% at the nominal level, 0.25% at +6dB, 0.4% at +10dB and so on). Of course, if I replace R5 with, say, 12k, and maybe lower R6 and increase R4 (and increase R8-R9) it all works as intended and cleanly (and I also have huge gain). I have tried increasing R4 to 11k while lowering R3 to 1-1.5k and it keeps a similar characteristic while being able to drive 10k better (with some slight increase in distortion close to clipping, but little higher order harmonics).

[antonis]

I know that Q3 is misbiased and that voltage swing is not optimised

So why you describe as "crap" the behavior of a heavily loaded misbiased Emitter follower..?? 

[fryingpan]

I know that Q3 is misbiased and that voltage swing is not optimised

So why you describe as "crap" the behavior of a heavily loaded misbiased Emitter follower..?? 

Because I assume you can maintain the behaviour of the amplifying stage with a better output buffer.

[amptramp]

Is it time to consider an op amp output buffer?

[fryingpan]

I want to avoid integrated circuits altogether (it's just an exercise for me, which I will build, but of course I could do all I'm doing with, like, one chip).

Anyway I experimented with an active load to the emitter follower. Things are much better behaved.



The emitter current is 1.3mA, and the current into a 10kohm load is 800uA. The voltage is about where I want it to be. If I set R11 to 24k, then emitter current is 1.7mA (I have more leeway) and the voltage is still about there (just 30mV below or so).

[antonis]

I presume OP wants to stay discrete & bipolar..

If so, and taking into account his contenteness at amplification stage, a stand-alone (not directly coupled) BJT buffer could fulfill his requirements..

e.g. Emitter biased at about 5.5V with Emitter resistor of 3k3 could easily drive Q2 output of about 2.8V_RMS (4V amplitude) into a 10k load..

edit:
@fryinpan: I'd configure Q4 as current source (2 series diodes from Base to GND, delete R11, make R3 10k or so and R12 value set according to current taste..)