JFET Bias confusion.

[idsnowdog]

I am building an Astrotone Fuzz clone and while I like the sound of the front half of the circuit before the second coupling capacitor I do not like the sound of the output stage.  I don't understand why there would be a capacitor before and after the diode clippers?  So, I built a JFET output stage instead but I am running into a discrepancy between values that worked on the breadboard versus hard wired.

While testing on the breadboard I could take the output off the Q1 collector and with a 12K resistor on drain and a 5K on source I was getting 5V.  However, once I hard wired it using this layout I needed a 100K resistor on the drain to get 5V and I had to take output off the capacitor instead.  Which was the exact opposite of the breadboard.  What would cause this and how can it be fixed?

[idsnowdog]

The original layout.

[antonis]

I don't understand why there would be a capacitor before and after the diode clippers?

To block DC from Q1 Collector and Q2 bias configuration..

As for the rest, could you plz post a schematic of your own build..??
(layouts don't help much..)
In original Astrotone, Q2 is an output buffer BJT.. In your build, Q2 is an output CS amp..
(there is a big difference in output impedances, among other things..)

P.S.
Are you sure for Q2 in your layout being a JFET..??

edit: 12k & 5K are flipped on your layout..!!
(on breadboard, 5k is Drain resistor where on layout is Source resistor..)

Out of curiosity 1: What's the idea behind Q2 stage configuration..??
Out of curiosity 2: What's the idea behind getting unclipped (out of clipping diodes) signal directly from Q1 Collector..??
Out of curiosity 3: What's the idea behind feeding next stage with a significant DC level..??

[duck_arse]

the datasheets I looked at for the 2N5460 show a P-channel jfet, with end gate pinout. which doesn't match up with your diagram.

[antonis]

If you think it's the only weirdness here, Stephen, I'd presume you consider pretty normal to take output directly from +9VC supply, like in first pic..

[duck_arse]

well it would be quiet, certainly.

[antonis]

well it would be quiet, certainly.

Can't argue till OP demostrates PS filter..
(e.g. any ripple higher than 2% (say) could account for 180mV/120Hz signal..)

[idsnowdog]

I don't understand why there would be a capacitor before and after the diode clippers?

To block DC from Q1 Collector and Q2 bias configuration..

As for the rest, could you plz post a schematic of your own build..??
(layouts don't help much..)
In original Astrotone, Q2 is an output buffer BJT.. In your build, Q2 is an output CS amp..
(there is a big difference in output impedances, among other things..)

P.S.
Are you sure for Q2 in your layout being a JFET..??

edit: 12k & 5K are flipped on your layout..!!
(on breadboard, 5k is Drain resistor where on layout is Source resistor..)

Out of curiosity 1: What's the idea behind Q2 stage configuration..??
Out of curiosity 2: What's the idea behind getting unclipped (out of clipping diodes) signal directly from Q1 Collector..??
Out of curiosity 3: What's the idea behind feeding next stage with a significant DC level..??

The core problem seems to be the middle of the circuit.  The capacitor, diode, capacitor part.  I haven't seen that on anything else I have built.  I have built plenty of other boosts, fuzz, and overdrive pedals with either hard clipping on the output or soft clipping without issue.  I am used to thinking of coupling capacitors as tone shaping between stages and occasionally as hum reduction.  I'm not sure what the capacitors are doing or why they are needed in the original circuit?

I removed the BJT output buffer because I had this roaring Electra style circuit going into a buffer which only reduced output and didn't seem to add anything useful.  So, I thought why not try add another stage of amplification instead.  Inspiration came from the Multiface schematic which shows a BJT front end with a JFET or MOSFET back end.

While breadboarding I tested different JFETs, and MOSFETs to see if I could get a useful sounding second stage.  The problem is while I got positive results breadboarding I couldn't translate that into a workable turret board layout.  While moving components from the breadboard to the turret board I lost track of the type of JFET I was using and I couldn't adjust the bias of either transistor without throwing off the other.  I was also running into phase issues and the gain control I had stopped working. 

So, how can I eliminate interaction between the bias of the two transistors?

[antonis]

So, how can I eliminate interaction between the bias of the two transistors?

Add another series capacitor (between diode pair and Gate) and ground Gate via a big value resistor..
(and pray, of course..)

P.S.
In case you don't like capacitors, delete 10nF on Collector out, disconnect piodes pair lower end from Emitter and bias at a DC voltage level equal to that of Q1 Collector..

[PRR]

I got positive results breadboarding I couldn't translate that into a workable turret board layout.  While moving components from the breadboard to the turret board

Then I think that's what you should work on. How are you going astray just moving parts from one board to another? Are you getting nodes mixed-up?

[idsnowdog]

I got positive results breadboarding I couldn't translate that into a workable turret board layout.  While moving components from the breadboard to the turret board

Then I think that's what you should work on. How are you going astray just moving parts from one board to another? Are you getting nodes mixed-up?

I had a small pile of components that I was testing.  When I removed the parts from the breadboard they got mixed up.  I have my parts organized by type and value in an organizer but what I thought was a 2Nxxxx was actually a 2Nzxxy.  Because the markings are so small only a termite can read them.

Last night I set up a test rig on the breadboard with 10K resistors on the drain and source.  I then tested each of the FETs I have to see how close they are to 5V bias. About 30-40% of them are very close but their pinouts vary.  I did not write down which matched but it won't take long to repeat the process and that gives me a list of candidates.  My BJTs are 99% C/B/E but the FETs fall into three different patterns.   I may create new labels and organize them by pinout. 

[PRR]

the markings are so small only a termite can read them.

True. SmartPhone cameras often focus close/big. Sewing stores (JoAnn, Michael's, but also Singer dealers, etc) have practical magnifiers. Bring one of your parts to try. If you have a Dollar(Pound, Shekel)-Store, look for Reading Glasses in a high number like over 3, they let you focus close and see teeny.
https://www.dollar-store.us/product/reading-glasses-3-25-black-brown-copy/

[idsnowdog]

I was able to find a JFET I like the 2N4858 and it works great with 10K resistors on the drain and source at 4.6V.  I will put the clipping diodes on a SPST switch because Q1 has plenty of overdrive.  The diode clipping is a very different texture and both are useful.  I haven't moved the JFET to the turret board yet and I haven't tried any controls.  This is the anticipated layout. 

   

[antonis]

May I ask the reason for using a Common Source amp of almost unity gain instead of a Source follower..??

[idsnowdog]

May I ask the reason for using a Common Source amp of almost unity gain instead of a Source follower..??

That would mean taking the output from the source of the JFET instead of the drain right?  Wouldn't that be largely the same as the original BJT buffer circuit?  I could try it because I don't have any jacks wired yet. 

The transfer of components from the breadboard to turret board worked without any weirdness.  Before I began this project I thought those two coupling capacitors looked unnecessary. 

[antonis]

That would mean taking the output from the source of the JFET instead of the drain right?

Exactly but with different configuration..
No Drain resistor and Source biased at about 4.5V or a bit higher.. Also implement relatively low value Source resistor (a couple of kilo-ohms or so) for effective next stage drive,,

Wouldn't that be largely the same as the original BJT buffer circuit?

Actually it would be worse due to JFET's higher Source impedance (1/g_m >> r_e)

Your JFET CS configuration (10k/10k Drain/Source resistors) is the worst due to much higher Drain output impedance (10k)..

[idsnowdog]

That would mean taking the output from the source of the JFET instead of the drain right?

Exactly but with different configuration..
No Drain resistor and Source biased at about 4.5V or a bit higher.. Also implement relatively low value Source resistor (a couple of kilo-ohms or so) for effective next stage drive,,

Wouldn't that be largely the same as the original BJT buffer circuit?

Actually it would be worse due to JFET's higher Source impedance (1/g_m >> r_e)

Your JFET CS configuration (10k/10k Drain/Source resistors) is the worst due to much higher Drain output impedance (10k)..

I tried it connected to the source and it is quieter and darker sounding.  Although tweakable I don't think it would be much better sounding.  Coming off the drain it's noisier but also richer in harmonics and sounds louder. 

The first half of the circuit is louder on its own.  But a BJT driving hard clipping diodes is an Electra and nothing new to me.  My rationale is vanilla+vanilla tastes like vanilla.  But vanilla+orange, or vanilla+cherry tastes very different.  I like how the JFET stage distorts and adds to the texture even if it's lower output than the first stage alone. So the second stage wasn't there to transparently amplify the first stage.  It is there to add a different flavor.  It may not be an efficient design but distortion is inherently inefficient and not something to be avoided.

[idsnowdog]

I tried another round of biasing Q2 with a 6.2K drain and 12K source.  It is now 5.2V instead of 4.6V.  The noise level dropped, output improved slightly, and clarity improved.   

[amptramp]

I gave up on JFET's a long time ago.

I have a Sencore SG165 alignment generator for AM and FM stereo radios where the bias on the output buffer is connected as a Sziklai pair with an MPF102 JFET and a bipolar 2N5227 PNP second transistor.  It showed signs of burnout of the source resistor.  The 390 ohm resistor had gone up to 2195 ohms and I was getting little output on the negative cycle.  It turns out that the 1/4 watt resistor was dissipating around a watt because the Vgs was at the highest value for the part, about 8 volts meaning that the resistor had 20 volts across it.  This feeds a 50 ohm attenuator, so the output was 0.022 of the input on the negative half of the waveform.  And this was in a piece of mass-produced test equipment.

I like FET-input op amps because the processing keeps the difference between FET's to a minimum, but individual JFET's vary too much to avoid select-on-test bias resistors or potentiometers.

[idsnowdog]

The finalized design of the AnarchoTone Fuzz.  I has a PN3565 in Q1, 2N4858 JFET in Q2, and Q3 is a cascode Germanium 2N464.  The controls are volume, Q1 sag, Q2 gain, and a SPST to engage the 2N464.  It's a medium gain overdrive that becomes a fuzz as the Q1 sag control lowers the collector voltage.