9v Sample and Hold

[Brett Clark]

Using a single-stage S/H here is just asking for trouble. The sample clock feedthrough problems are probably fixable, but it would be MUCH easier/better just to go to a two-stage design. Cleaning up the power supply is deck chairs on the Titanic here.

The idea (of a two-stage S/H) is that you "pre-sample" the input onto a first cap. Then you transfer that voltage with a buffer amp onto a second cap, which is buffered to produce the output.  The two switches are switched 180deg out of phase with each other, by a slew-limited square wave (not a narrow, noise-inducing pulse). Here's an example of the idea - the component values will have to be selected for your purpose. If you get it set up right, there should be very low clock feedthrough or drift, etc. Don't let the rise time on your square waves be too sharp - low pass filter it a bit, or (better) control it in the oscillator design.

I'm not sure where this idea came from. I don't specifically remember seeing it anywhere, so I may have actually thought it up. It might also have been from some old synth that I worked on back in the day - if anyone recognizes it, let me know and I'll give proper attribution. I have no idea if there is any patent protection on this, so use at your own risk. This particular implementation is in my lab book dated 12/03/03 (in hand-scrawled form) - I was on a kick of reimplementing things with only discrete components. I had built an earlier version using a 4066 and op-amps.

[Maneco]

http://www.elby-designs.com/pixie/pixie-lfo.pdf

http://www.elby-designs.com/pixie/pixie-noise.pdf

not 9v,this is 5v,you need a 7805....

[soggybag]

Thanks for all of the suggestions. Brett it looks like you are on the road to a discreet BBD. This looks like a better system. The ability to sample the sample voltages at different points is very interesting. There was a Serge Synth Module I seen that did that.

I tried the Variable Duty Cycle 555 schematic listed by Eb7+9 above and it works very well. It can dial in the On Off times as short or long as you like.

I have a question about  FETs. I'm using a 2n5457 I have the gate connected to ground and the Source to +9V with the Drain connected to ground through a 100K. When I measure the voltage across the 100K I would expect to see 0V but I see about 1.69V?

After some testing I find that the 555 Output goes from about .01 to 7V. Will the .01V in the low state hold the gate open to any degree? I'm looking at the data sheet for the 2n5457 but I'm not sure what value I'm looking for?

I really don't like the 555 chip itself. These things are so funky. Despite I still think it's the easiest way at this point.

I like the Pixie LFO. It's very interesting. The random voltage generate is very interesting, though I could not figure it out.

[Brett Clark]

Brett it looks like you are on the road to a discreet BBD.

Yep - just do that stage 510 more times and build a chorus.

I have a question about  FETs. I'm using a 2n5457 I have the gate connected to ground and the Source to +9V with the Drain connected to ground through a 100K. When I measure the voltage across the 100K I would expect to see 0V but I see about 1.69V?
.

Well, normally an N-channel FET is operated with the Drain more positive than the Source. Some, like the J201, are pretty symmetrical and will operate with D and S reversed. Others don't - I'm not sure about the 2N5457. Try connecting the Drain to +9V and the Source to the 100K to ground. Vgs(off) for the 2N5457 is about -5V, so it should be completely turned off at -9V. If reversing it doesn't work, your FET is bad.

The random voltage generate is very interesting, though I could not figure it out.

Well, 60 years ago, that circuit (with relays/tubes) was a state secret. No joke - that's a psuedo-random ring counter, which was state-of-the-art encryption technology in WW2. It makes an output sequence which is *apparently* random, but in fact eventually repeats. Check out The Art of Electronics for more details.

[soggybag]

Oh man, you're saying that the gate has to -5V to be completely off? How can I do that with a single sided PS?

[gez]

Oh man, you're saying that the gate has to -5V to be completely off? How can I do that with a single sided PS?

Vgs off varies from FET to FET - literally!  You need to buy a number of devices then test them individually, or select a type where the manufacturer guarantees all their devices fall with the range you desire (look through what your supplier has to offer and check data sheets).  There was a recent thread on all this and some recommendations.

4016/4066 type switching will guarantee on/off operation.  You could even wire up two of the switches as your oscillator.

[Eb7+9]

... hadn't seen Ray Wilson's clock circuit  before - cool !

Somebody correct me if I'm wrong but it seems like this circuit idea could be made to work on a single supply ... replacing R12 and R13 by a trimmer setting the threshold level carefully and using the right FET for Q2 should do it ... or even with a bipolar transistor for Q2 ... certainly something to investigate :wink:

... funny, I was recently thinking of experimenting with Nyquist Aliasing as a gtr effect and was looking for this sort of circuit to do it with ... I'm curious what the worse-case on-times are like ?? ... certainly, it avoids some of the problems associated with 555's ...

- thnx for bringing it up soggybag !

~jc

[Brett Clark]

Oh man, you're saying that the gate has to -5V to be completely off? How can I do that with a single sided PS?

That's just -5V with respect to the more negative of D or S. It may also be less on your particular FET. But, now that I've had some sleep, I see that it may be that in your follower, you're just not able to pull the gate down far enough to turn things entirely off.

If you're making gain stages or followers to run on 9V single supply, save yourself some trouble and get some J201's. They have very low, relatively consistent Vgs(off)  - about -1V or less.

[soggybag]

Thanks for the replys. I went through my Transistor box and tested all of my FETs and J201s seemed to be the most "off" with the gate at 0V. I think I will switch back to these for testing.

I broke out The Art of Electronics last night and read through the chapter on FETs. I have to point out that I got my education at an art school so most of this stuff is over my head though I do pick something now and then.

I did find some examples of electronic switches and their FET of choice was a MOSFET. The book did not seem to mention that gate had to be below 0V to be fully closed, they seemed to keep saying 0V was enough from what I could tell.

The idea of using a MOSFET sounded like it might be a good place to experiment. I have a bag of 20 BS170s (thanks Aron). Any thoughts or suggestions? I have read a few posts complaining about the fragility of these devices.

Thanks for the suggestion Eb+7, I might go back back to the op-amp style. In my first attempt I had whipped up a version of thge Maetsrto FSH-1 running on 9V. It seemed to work but the LFO seemed to introduce a big spike in the whole system which was becoming a problem. This led me to chooose a 555 LFO.

I had built two FSH_1s so far and they both leak a little of the LFO into the signal.

It looks like Ray's S&H could be made with the noise source built around U1-d and the Trigger input could be left out. The extra op-amp could be used for something else. Maybe I will give this a try later.

I built and tested the variable duty cycle 555 timer from the link you posted. I tested it with two 100K pots for the variable resistors. I put the signal on the scope. It seemed that it made a nice square wave with a tiny slope at the top of the "on" cycle, and was able to dial the width of each of "on" and "off" to any width without problem.

[gez]

The MOSFET will guarantee on/off operation, but when its gate is high the output of the opamp can only swing so far upwards before the FET cuts off.  The max positive swing will be Vc minus the threshold of the MOSFET.  What is the threshold?  It varies from device to device.  BS170 shouldn’t be a problem though, even though the data sheet says max threshold of 3V I’ve yet to come across one that is that high.  With large amplitude signals distortion of the waveform will occur, but that's not really an issue here.

Best choice would be a CMOS switch…

[Brett Clark]

Most MOSFET's are enhancement mode devices. This means that they're OFF with Vgs=0 - you have to bring the Vgs positive (for N-channel) to turn them on.

[soggybag]

*** EDIT ***
I added some test voltages to the drawing.


I built a version of Ray's Sample and Hold for +9V today. I used this schem


I just added a voltage divider and added the noise generator, took out the input buffer and trigger sections.

Here's an image of the scope. I turned the LFO up as fast it would go and connected the probe to pin 7 of the TL-082.


The wave looks pretty random. Though it's a little hard to tell if this correct. I set the Time Div to 10 ms and the Volts Div to 50 mv. I measured the the output at pin 7 with my multimeter at about 5.6V.

This could work well but the range of voltages is not useable as is.

[Eb7+9]

... this confirms the clock works good on a single supply  ... and your 2n5457 doing an adequate job ... great!

I have a problem with that Maestro noise source design ... they're asking an avalanching transistor to drive an AC ground point as the op-amp is configured as current follower driving a large resistance in the loop - this is killing the noise source ... I recommend instead  wiring the noise op-amp in non-inverting configuration with a trimmer adjust for gain and have the Zener connected transistor drive the + input of the op-amp ... this way there's negligeable loading on the Zener connected transistor ... you get more of a random white noise output and exactly the output you want ... this may help you get a wider range of sampling output ...

I'm also looking at the slewing occuring between sampling points in the pic ... I suspect part of it is due to R16 being grounded in conjunction with the Vr  bias reference having hardly any drive ...  I think you need to buffer the Vr bias node with an op-amp to provide the sampling cap with a really good AC ground - that passive network maybe be ok in some op-amp distortion boxes but not here ... you may also want to give the noise circuit it's own variable Vr reference (raising it slightly) to get a better "off" state for the channeling FET  - this will raise the sample range center average ... which is not a problem if you're using a shifting/scaling circuit afterwards anyway ...

~jc

[Paul Perry (Frostwave)]

Soggybag, that CRO should be on DC! that's what makes it look like the s7h is sagging!

An alternative s&h approach, in the National Semi LM13600 application notes, involves switching the bias on & off Or for the wealthy & lazy, there is the LF398 dedicted s&h chip (ok, the specs say +-5 supply, I'm sure you could work it at 9v!, just watch the logic input gotchas).

[soggybag]

Thanks again, very good observation Perry, switching the scope to DC made for a clean stair stepped random wave form. In this mode the variation between steps is very small and I couldn't get a good picture of it with the digital camera.

Eb7+9, I tried to arrange the noise source as a non inverting amplifier but I could not get any noise out of it?
Here's an image of the noise  source with the non-inverting amplifier. I took the idea straight from the Forest Mims op-amp booklet.

[puretube]

how about using the base/emitter "diode" as noise-generator,
and leave the collector "n.c." ... :wink:

btw., 9V is on the low side for such a noise-transistor...


[edit]: e.g.: http://sound.westhost.com/project11.htm

[soggybag]

Thank Puretube I'll give the B E a try. It looks like the problem is with the bias at the - pin.

[gez]

In your schematic there's no bias to the +ve input of the op-amp.

[soggybag]

Here's a small updatte. Not much progress btu I'ved added a few notes to the schematic.
At the bottom are three different attempts to get the noise souce to work with  a non-inverting amplifier. None of these seemed to work as well as the first.

Here's picture of both the clock pulse and the CV out on the scope. The CV is viewed in DC this time. It's hard to see the difference in this still image since the range is so small. But it looks pretty looks pretty random in person. It's hard to capture a good image with the Time Div low enough to show a few samples.

[Dave_B]

It's hard to capture a good image with the Time Div low enough to show a few samples.

If you have Sound Forge or something similar, you might be able to plug the s/h into your sound card to capture the "waveform."  It's not the same thing, but I did it when I was troubleshooting some drum pads.