Momentary SPST = True Bypass?

[no one ever]

Could somebody assist me and give me a fresh set of eyes to double check my layout against Laurier's circuit... I've checked it and it seems ok, but as this is my first layout, I'd like somebody more experienced to check it for me.




thanks a lot!

-derek

[spudulike]

No V+ to the relay - one side of the coil goes to diode cathode, but not V+.

[johngreene]

That unused nand gate should not be wired like that. If both inputs are tied together it operates like an inverter. The output should not be connected to anything.

--john

[Paul Perry (Frostwave)]

No V+ to the relay - one side of the coil goes to diode cathode, but not V+.

Well, pin 14 is supposed to be V+, isn't it? Then when the transistor conducts, the relay should go on.. check the voltage across the relay, see if it changes when you switch, it might just be not enough current to pull your relay.

[no one ever]

That unused nand gate should not be wired like that. If both inputs are tied together it operates like an inverter. The output should not be connected to anything.

--john

so should there be anything at all connected to those pins?

[johngreene]

leave the inputs tied high, do not connect the output.

[CS Jones]

Hi John,
FWIW... I was taught to ground the inputs on all CMOS devices and "float" the outs (leave untied).

[johngreene]

If you are designing a PC board from scratch, yes I would agree. There's usually an abundance of ground plane around. Although when prototyping, I prefer to tie the inputs to whatever leaves the output low. That way if the output gets shorted, it doesn't harm anything. But realistically it's usually it's whatever is closest, high or low. As long as they are tied to some state so they don't float and possibly oscillate.

[no one ever]

so this is a change for the better:

[johngreene]

? If that is the Nand gate chip, no, it's not better because all you did was disconnect one of the inputs and left one input and the output tied to +9 V. Pin 3 should not be connected and pins 1&2 should be connected together and tied to either +9 or GND.

[no one ever]

? If that is the Nand gate chip, no, it's not better because all you did was disconnect one of the inputs and left one input and the output tied to +9 V. Pin 3 should not be connected and pins 1&2 should be connected together and tied to either +9 or GND.

I'm sorry if I frustrate you, but I intended this peer review session for personal education...

On the schematic, aren't pins 10, 11, and 4 inputs? And pins 1-3 aren't used at all anyway...

[Mike Burgundy]

They are outputs. A NAND gate works like an AND gate with an inverter stuck behind it - if the inputs (for eample pin8 and 9) see 0/0, 0/1 or 1/0, an AND would put out a 0 (voltage low), so a NAND would put out a 1 (voltage high). If an AND sees 1/1 (so one input is 1 AND the other is 1), only then will it put out a 1. A NAND will put out the reverse of that, a 0.
So a NAND will put out a 0 ONLY if it's inputs are both 1.
Hook up BOTH inputs together, and the NAND effectively works as an inverter - 0/0 yields 1, 1/1 yields 0.
if you close the pushbutton switch, the inputs 8 and 9 shortly spike to high voltage - a 1. This lets a 0 appear on pin 10, which causes a 1 to appear at 11, which holds 8 and 9 at that same 1. It's a flipflop made by the leftmost two inverters!
Push the button again, and 8 and 9 shortly get pulled to low voltage, which causes the whole chain to reverse.
The third inverter isolates the lot from stray effects caused by the switching transistor, the transistor (switched on and off by the 3rd inverter's output) can pull enough current to actually power the relay coil.
hih
PS - you'll now also see why hooking the unused inverter up to ground with all ins and outs will cause it to continuously want to force the output at a 1 which it can't - the output is hardwired to ground. It won't oscillate, but it will try to kill itself pumping current into the output to get it high. Same goes for tying it to V+. Tie the inputs to either ground or V+ and leave the output unconnected.

[johngreene]

? If that is the Nand gate chip, no, it's not better because all you did was disconnect one of the inputs and left one input and the output tied to +9 V. Pin 3 should not be connected and pins 1&2 should be connected together and tied to either +9 or GND.

I'm sorry if I frustrate you, but I intended this peer review session for personal education...

On the schematic, aren't pins 10, 11, and 4 inputs? And pins 1-3 aren't used at all anyway...

I apologize if I sounded frustrated! It was not my intention. Anyway, Mike's explaination of nand gates should help. My comments were solely targetted at the unused gate on pins 1, 2 & 3. For some reason, the PC board layout in your first post never showed up for me until today, so I was working solely from the schematic.

Some general comments on your layout:
Connect the one 100K resistor to pin 5 instead of running it all the way over to pin 11.
If you flip the 2n2222 over so if faces the other way, it will be easier to route to ground.
If you moved the cap up to the top of the board, you wouldn't need J1.

--john

[Peter Snowberg]

On the schematic, aren't pins 10, 11, and 4 inputs? And pins 1-3 aren't used at all anyway...

Pins 10, 11, 4, and 3 are all OUTputs. Just to repeat John and Mike above, leave pin 3 unconnected.

Connecting both of the inputs and the output of an inverting gate to power (or ground) will let the blue smoke out of the chip.

Google for a 4011 datasheet and save it to your hard disk. I use http://www.datasheetcatalog.com/ for getting semiconductor data sheets.

Do that for every chip/part you use.

When you lay something out, always try to accomplish two things, (1) make traces as short as you can, and (2) try to avoid tight geometries as much as you can (i.e. running a trace between two IC or transistor pins.

Remember that layout is an iterative thing. Do a layout, stand back and look at it, and re-do it.

[spudulike]

.
.

No V+ to the relay - one side of the coil goes to diode cathode, but not V+.

No power to the relay at all.

[no one ever]

I apologize if I sounded frustrated! It was not my intention. Anyway, Mike's explaination of nand gates should help. My comments were solely targetted at the unused gate on pins 1, 2 & 3. For some reason, the PC board layout in your first post never showed up for me until today, so I was working solely from the schematic.

Some general comments on your layout:
Connect the one 100K resistor to pin 5 instead of running it all the way over to pin 11.
If you flip the 2n2222 over so if faces the other way, it will be easier to route to ground.
If you moved the cap up to the top of the board, you wouldn't need J1.

--john

thanks a lot john! your suggestions let me trim a cm or two off the board.

revision 2:

[Hal]

any reason you have the top connectors where they are?  It seems like you can move them around a bit and save some space.

[johngreene]

If you rotated the 2n2222 another 180 degrees you could probably bump it up even more. However, you do need to route the 9V down to that end of the board as spudulike pointed out.

--john

[no one ever]

i like the neatness of all wires at one end of the board... i was inspired by tonepad.

is this my final revision.. v+ in green. thanks for correcting that glaring error, spud.


thanks for all your help, everyone! i really appreciate it. 

[no one ever]

final revision...? is it alright to have that 0.1uf cap after the collector of the 2n2222?