logic gates

[ingrowing_whale]

Hello,

I'm doing a circuit using cmos 4000series gates. The circuit doesnt seem to work because when I turn the thing on the Q and Q\ outputs are both at high level. Is this because I'm trying to use 4.5V instead of 5V? Thanks.

The circuit works fine on simulation with ISIS.

[ingrowing_whale]

actually,

every input and output that are linked to the circuit have got a high output.

[gez]

The circuit doesnt seem to work because when I turn the thing on the Q and Q\ outputs are both at high level. Is this because I'm trying to use 4.5V instead of 5V?

The 4.5V wouldn't matter.  I take it you're using a flip flop.  With the 4013, in 'direct' mode, if both set and reset are high then both Q and Q/ will go high for as long as both inputs remain so.  Is this your problem (these outputs might be holding everything else high)?

[gez]

PS  Check you've got a ground connection for all the chips.

[ingrowing_whale]

nope the reset and set pins aren't linked to anything. It's a 4027 flip flop

[ingrowing_whale]

could it be the fact that the J and K inputs are at high level? It worked on the simulation but I supose that might be a problem, because J=1 and K=1 isnt a combination in the datasheet

[Processaurus]

nope the reset and set pins aren't linked to anything. It's a 4027 flip flop

I'm not sure about everything going on, but all the inputs (including set and reset) need to be tied to a logic level. looking at the data sheet
http://pdf1.alldatasheet.com/datasheet-pdf/view/26863/TI/CD4027.html
it says the set and reset is triggered by a high signal, so ground each of those pins if you aren't using them.

[ingrowing_whale]

ok that's gonna be a hard one but I'll try. Oh yeah the vss input is linked to earth. Is this right?

[ingrowing_whale]

I also have another problem :

My RS gate made out of NOR gates doesnt work either. I have the right ouput levels before pressing on my switch, but when I let go of my switch the outputs just go back to normal. There is no latching action.

[gez]

ok that's gonna be a hard one but I'll try. Oh yeah the vss input is linked to earth. Is this right?

The set & reset need to be tied to a logic level.  Whether it's high or low will depend on what you wish the FF to do (check data sheet/on-line tutorials/CMOS Cookbook).  If you're clocking the thing, tie them both to ground.  This isn't an option.

Yes Vss pins are tied to ground.

[gez]

could it be the fact that the J and K inputs are at high level? It worked on the simulation but I supose that might be a problem, because J=1 and K=1 isnt a combination in the datasheet

In clocked mode the J & K inputs decide what the FF does.  What do you want it to do?

PS  If you can afford it, CMOS Cookbook by Don Lancaster is a must...has all this info in nice handy format.

[ingrowing_whale]

flippin heck I can't believe this one :

I mesure the voltage at the 2 in pins of my AND gate : 1=0.35V 2=3.5V and the ouput is 3.5V. This shouldn't happend should it?

[gez]

It would help if you posted a schematic, or at least outline what you've done so that 'normal' can be defined. 

[ingrowing_whale]

Ok here's the schematic :

http://daniel.hayter.free.fr/finaldesign.BMP

ok this is how it works : you select which way the motor will turn with the JK flip flop. You then activate the motor with the RS flip flop (the NOR gates). The motor then turns until it has turned 5 times (12 pulsations from the clock which is physically attached to the motor so don't worry about the clock). Then it stops. However if the motor turns too far, there is a security detector which is the switch SW1. Once this switch opens, the motor stops, the system is reinitialised and the JK switch toggles and you can't rechange the direction untill the SW1 has closed again (when  the motor has turned the other way). Voila!

oh and I linked the set and reset pins to the ground and that works now so that's not an issue anymore :

Here are the issues :

When I press on the push button to activate the RS flip flop there is no latched action and the output just goes back to 0 after having let go of the button.
The U3:B output is high even though it shouldn't be meaning that I can't change the direction with the JK flip flop.

[ingrowing_whale]

I think i've found something that could help :
The output 10 of the AND gate is low (0.001V) however after the diode 12 the tension is 0.5-0.6V which could be causing the problem of the high output in the next AND gate. Does anyone know why there is 0.5V at the output of the diode?

[gez]

If I have some time this afternoon I'll scan thru the schemo.  Thanks for posting it (saves stabbing around in the dark).

[gez]

Haven't had time to go thru whole schematic yet, but the thing that first strikes me is you're loading the outputs of the flip flops heavily. 

You haven't specified what the supply is on the schematic, but I think you said it was under 5V (are you using a 5V regulator and if so, what's it's max current rating?).  Going by that figure, and having checked a few data sheets for the 4027, I don't think they're going to be able to cope with those sort of loads.  Does the base current of the relay drivers have to be so high?  Would it be better to use MOSFETs?  Would it be possible to use more efficient LEDs?

Don't know if you have other problems yet as I haven't gone thru the schematic in any detail.  Will do so when I have another spare moment.

[gez]

When I press on the push button to activate the RS flip flop there is no latched action and the output just goes back to 0 after having let go of the button.

Try removing the load.  Does it latch now? 

[ingrowing_whale]

what do you mean by load?

[ingrowing_whale]

do you mean I should put a smaller resistance after the push button?