JFET matcher question

[Ponchus]

Hi
I built a JFET matcher from the MarkM's layout in the gallery (http://aronnelson.com/gallery/album77/JFET_Matcher_perf_LAYOUT)

I hooked up a 9V battery, my DMM, and set the DMM to measure voltage....it immediately goes to 4.25 volts, even without my jfet hooked up. When I plug in the jfet (a j201 in this case), there is no change on the reading...

Am I doing something wrong in my reading, or does it sound like I messed something up on the matcher itself (which would be embarassing, as it's probably the easiest thing to build...it was my first perfboard build though :-))

Any help would be welcomed

[Ponchus]

bumpity bump

[mdh]

I would check for a short between pins 6 and 7 of the op-amp. That would give the behavior that you're describing, because the potential between the two test points would be fixed at about 1/2 of supply voltage.

[Ponchus]

I am not detecting a short (I did a continuity test with my dmm)

[mdh]

Hmm... well I took a look at the original schematic (http://geofex.com/Article_Folders/fetmatch/fetmatch.htm), and comparing it to MarkM's layout, I see that the drain and source are reversed in the layout relative to the schematic. However, my J201 (and 2N5485) data sheets say that the drain and source are interchangeable, so it seems unlikely that this would be the problem. For what it's worth, my JFET matcher lives on a breadboard at the moment, so I tried swapping those leads, and I got the same reading either way from a J201. Before plugging in the FET, the test voltage was about 1/2 supply voltage, then changed to about -0.3 upon plugging in the FET.

I don't see any other differences between the layout and the schematic, so if I were you, I'd double check the wiring. Also, you are using a single op-amp such as a 741 or a TL071, right? If you used a dual, you would need to change the layout to reflect the different pinout of the chip. If that's all good, then check some other FETs with it... if you're matching, presumably you have more than one.

[Ponchus]

Thanks for that info MDH.

For an opamp, I'm using a UA741CN (Mouser part # 511-UA741CN), which is a single if I'm reading it correctly.

I wasn't really sure what to look for at all with the matcher. I'm happy to hear that you also get a reading of about half the battery strength. The thing is that it doesn't change for me when I plug in the J201. I did try 2 or 3 different ones, and I did try them both ways (I actually put in a socket to make it easier). I checked all connections a bunch of times (not like there are many connections on this). I did continuity tests all over the place, and everything seems hunky dory. I also checked for inadvertant shorts and couldn't find any. This was, however, my first perfboard build, so maybe I did a sloppy job? I really can't imagine what the issue is. I'm just about embarrased 

[Ponchus]

By the way, stupidly I made this with 5% tolerance resistors. I only noticed after that it was suggested to use 1%, which of course makes perfect sense considering that I'm using this to measure stuff.

[Thomas P.]

By the way, stupidly I made this with 5% tolerance resistors. I only noticed after that it was suggested to use 1%, which of course makes perfect sense considering that I'm using this to measure stuff.

That really depends in which way you want to measure! As I see it there are no real numbers when it comes to JFETS used in Phasers. What you need are simply a bunch of jfets with simillar Vgs as measured with this circuit, whereas the real value of Vgs isn't so important (because you've picked the fets for this application, right) as long they are in a usefull region.
Now the 5% tolerance of the resistors means that the value of a particular resistor lies within a value of ±5% of what it is labeled, BUT this value doesn't vary! Which means if you've bought a 100k 5% resistor and the measured value is 103k this value sticks. We call that a systematic error (or inherent bias).
So by haveing a measurement setup (for example you would like to know the current by measureing the voltage across this resistor) the error will always be the same! Consider it as an offset to your measurement.
Now back to the fets: If two (or hopefully more) have the same Vgs (measured with the mentioned circuit), they have the same Vgs even though you will not now the EXACT value.

[markm]

Hmm... well I took a look at the original schematic (http://geofex.com/Article_Folders/fetmatch/fetmatch.htm), and comparing it to MarkM's layout, I see that the drain and source are reversed in the layout relative to the schematic.

This is news to me....
Mine worked fine and still does and have heard positive results from others.
Maybe different brands have different pinouts? 

[Thomas P.]

This is news to me....
Mine worked fine and still does and have heard positive results from others.
Maybe different brands have different pinouts? 

Of course! Either way DSG or DGS are available but this should be very easy to include in your layout by just adding another drain-pad on the right.

[markm]

Of course! Either way DSG or DGS are available but this should be very easy to include in your layout by just adding another drain-pad on the right.

No kiddin' huh 

[slacker]

Hmm... well I took a look at the original schematic (http://geofex.com/Article_Folders/fetmatch/fetmatch.htm), and comparing it to MarkM's layout, I see that the drain and source are reversed in the layout relative to the schematic.

He's right, the schematic has the drain connected to 9volts and the source connected to the inverting input of the opamp. Mark's layout has the drain connected to the inverting input and the source connected to 9 volts.
I don't know if this makes any difference to how it works though.

[markm]

Well then,
Guess I'll have to change that huh? 

[mdh]

This is news to me....
Mine worked fine and still does and have heard positive results from others.
Maybe different brands have different pinouts? 

Well, the schematic on the page I linked shows the drain connected to V+, whereas on your layout, the source is connected to V+. It may be that there's a different version of the schematic floating around somewhere. When I looked at my breadboarded version, I actually had it wired the same way as your layout, and I'm pretty sure I worked directly from a schematic. It sort of makes sense that it shouldn't matter if you swap the drain and source, given how JFETs are doped (http://en.wikipedia.org/wiki/JFET), but swapping the gate with one of the other terminals would matter.

So Ponchus, maybe your FETs are pinned out DGS, rather than DSG, as Mark's layout assumes. Otherwise, I'm at a loss.

[Ponchus]

Well, worst case scenario, I'll just blame Mark for my failure 

No seriously, I think I'll just rebuild this and see what happens. It took all of 10 minutes. Really, I didn't know what I should be seeing with the matcher. Should I have seen 4.5v right away, even without a jfet plugged in? Should I be seeing lower numbers? Was my DMM even set to the right measurement? Etc etc. Now that I have those questions answered, I think I have something to work with.

And Thomas, your explanation of 5% vs 1% makes perfect sense. Thanks!

[markm]

This is news to me....
Mine worked fine and still does and have heard positive results from others.
Maybe different brands have different pinouts? 

Well, the schematic on the page I linked shows the drain connected to V+, whereas on your layout, the source is connected to V+. It may be that there's a different version of the schematic floating around somewhere. When I looked at my breadboarded version, I actually had it wired the same way as your layout, and I'm pretty sure I worked directly from a schematic. It sort of makes sense that it shouldn't matter if you swap the drain and source, given how JFETs are doped (http://en.wikipedia.org/wiki/JFET), but swapping the gate with one of the other terminals would matter.

So Ponchus, maybe your FETs are pinned out DGS, rather than DSG, as Mark's layout assumes. Otherwise, I'm at a loss.

Well, should I change it ya think?

[Thomas P.]

Well, should I change it ya think?

I'm not going to give any advice or I'm running the risc of getting ye ol' tounge-out again...

[markm]

 

[mdh]

Well, should I change it ya think?

I dunno, I suppose I would, but I honestly don't know whether it matters. If all JFETs that we would want to match really are doped like the wikipedia article shows, it would seem that it wouldn't matter. Maybe if one of the professional EE types happens across this thread (calling R.G.!), then maybe we'll find out for sure. I sort of doubt that it matters for matching, however.

[slacker]

Ok I'm not a "professional EE type" but I've got a breadboard and a spare 5 minutes, so in the interests of science I chucked the matcher together.
The results are.
1. If you measure across the measurement points without a JFET in the matcher you get about 4.5 volts.
2. The orientation of the drain and source doesn't appear to matter, testing J201s both ways round I got the same results.

So I guess there must either be something wrong with Ponchus's build or the JFETs he's trying have a funky pinout.