E&MM Harmony Generator project PCB

[Bassmanfox]

I've wanted to start building this pedal for a while, but before I start I'd like to make a layout of it, so I had a couple of questions.  First off, would it be worth it to incorporate the max1044 into this circuit to get +-9v for the op amps and get rid of the voltage drop?  Second would it maybe be better to use a selectable/tunable high/band/low pass filter.  There were 2 on exp-anon that I found interesting:

I wish this one wasn't so hard to read:
http://experimentalistsanonymous.com/diy/Schematics/Filters%20Wahs%20and%20VCFs/Sallen%20Key%202P%20Filters.pdf



http://experimentalistsanonymous.com/diy/Schematics/Filters%20Wahs%20and%20VCFs/Simple%20Two%20Pole%20State%20Variable%20Filter.pdf

Just a few thoughts, tell me what you think, thanks for all the work so far

[Eb7+9]

you can probably get rid of much noise by further gating the chopper signal using a Lock-Detect signal - causing no synth output to happen when the loop is unlocked ...

... something like this (at the bottom) :

http://members.chello.nl/~m.heijligers/DAChtml/PLL/PLL1.htm

AND'ing both LD output signals and maybe adding some filtering before triggering the shut-off gate

or if you used a 46 type PLL with LD built-in,

... something like this :

http://www.nxp.com/pip/74HC7046A

...

the way it's implemented, as you slip fingers on strings, bang noise, etc., it can easily produce a non-zero envelope that's chopped by the VCO/divider idling at its (un-locked) fundamental freq ...

to b explore'd

[R.G.]

The phase pulses outputs of the CD4046 make a dandy lock detector with minimal additional circuitry. Check the RCA app notes.

[Andre]

Markus, what is the cut-off frequency of the LPF on your breadboard ?

Have a look at the Electrax synth

I did a search, but the links I found are dead.

First off, would it be worth it to incorporate the max1044 into this circuit to get +-9v for the op amps and get rid of the voltage drop?

I think I will first replace the 4040 for another one, maybe it's just the one I used that causes the problem. I will let you now shortly, but today the  partsshop is closed and I don't have any spare 4040's.

Second would it maybe be better to use a selectable/tunable high/band/low pass filter.

If you want to turn this circuit into a guitar synth, Yes!
To get rid of the harshness of the harmonics, I think a switchable low pass filter will do.

you can probably get rid of much noise by further gating the chopper signal using a Lock-Detect signal - causing no synth output to happen when the loop is unlocked ...

I'm not sure what I'd prefer: No output or wrong output

The phase pulses outputs of the CD4046 make a dandy lock detector with minimal additional circuitry. Check the RCA app notes.

R.G. I can't seem to find them. Could you please point me to these app notes ?

André

[markusw]

Markus, what is the cut-off frequency of the LPF on your breadboard ?

IIRC, it has a Fc of 30 Hz (2 pole). It was initially intended to be used with bass guitar but it works with guitar too. Nevertheless, for guitar I suppose 60-70 Hz would be better.

Somewhere on the net there is a calculator for 2 pole Butterworth lp filters. Unfortunately , I didn't bookmark it. However, I'm pretty sure you can find one of those calculators easily.

Regards,

Markus

[Paul Perry (Frostwave)]

I notice the TI CD74HC7046A has a lock detector built in already. But I don't know if you can just drop it in this circuit...
And, how's this for synchronicity: yesterday i found a present in my letterbox from a bookdealer friend (he threw it in unasked with a book I was buying)- "The Best of Electronics and Music Maker Projects Volume 1" with the harmony generator

[Eb7+9]

speaking of time-space synchronicity ...

it would be nice to be able to see what the phase-loop's transient nature looks like during acquisition - with a sampling scope perhaps ... the HG sounds surprisingly good already as is but the adaptive scheme used there might be giving the VCO an extra hit because of the second cap involved in the switching - normally adaptive PLL's switch a resistor on the one same cap - thus possibly contributing further to the inter-note glitch factor ... one leg of the loop filter does have a 25mS time constant - in it's low R state - already fairly long relative to audio ... well, that could be a compromised choice for "other" reasons ... sample plots would confirm the lock-in times and tell us whether there's any point trying to speed up acquisition ... regardless, there's always gonna be some glitching between the notes // hence the proposal to gate ...

adaptive PLL schemes have come a long way in the last 15 years - some of those ideas might well be applicable here ... I'm also curious to see where the idling frequency lies, this could affect the lock response of the circuit at one end of the neck ...

[TELEFUNKON]

http://www.electronics-tutorials.com/devices/74hc4046.htm

http://www.nxp.com/acrobat_download/datasheets/74HC_HCT4046A_CNV_2.pdf

btw: anybody remember THIS nice thread?

[markusw]

adaptive PLL schemes have come a long way in the last 15 years - some of those ideas might well be applicable here ...

Thanks for the tip! 
  Would you mind explaning briefly how adaptive PLLs work and what's the advantage of using them? I tried to figure it out for myself by "goggling" but I did'nt really come to a useful conclusion. 

I notice the TI CD74HC7046A has a lock detector built in already.

Is there a easy way to adapt a CD4046 for a lock detector?

btw: anybody remember THIS nice thread?

Sure 
I finally came to my personal conclusion that the AN-41 doubler works quite nice for one octave but due to the assymetry introduced by the integrator further doublings result in more or less noise with a touch of octaves.  If you just need it for doubling a constant frequency one could increase the lp filter of the feedback bias which gives a pretty pure octave (50/50 duty cycle) and thus probably could get 2,3 or even more doublings. However, with filter capacity large enough to give a pure ovtave the circuit becomes much too slow for use with guitar.
At the moment I'm pretty sure that a 4046 can give a reasonable performance even with minimal signal preprocessing (a 6-12db lp filter plus sufficient gain alreay gives satisfying results on breadboard). I believe that tweaking of the PLL's frequency range (just largen enough to cover the guitar range)  contributes to a faster/less noticeable lock in.

[Eb7+9]

you'll find that PLL's are typically used for a few basic purposes: to lock onto semi-stable clock or data streams and filter out the noise jitter (random deviations from the ideal edge location) for the purpose of producing a stable clock signal, tracking signals of intentional varying frequency and demoding the variation ... or as in our wide-range tracking situation which is not as common ... most papers don't have our exact app in mind but we can apply some of the methodology nonetheless, the numbers change that's all ...

a little background ... two variables are of chief importance, (i) the lock range, how far the frequency can deviate from a stable locked state before the loop looses lock, and (ii) the capture range, how far from the (Out-of-Lock) idling frequency a signal frequency can be locked to. there's a compromise between the two, for a given loop filter response we have a set of given lock and capture range figures that benefits one at the detriment of the other.  this also points to the importance of setting the idling frequency right - in the middle of the range I assume ...

In telecom apps jitter reduction is the order of  the day, and a PLL that has really good Jitter reductions (extremely narrow band) specs will be more easily knocked out of lock than a loop that filters jitter less, the one with better jitter filtering will also take longer to get back into a lock state unless there's an adaptive scheme put in place ... we're not interested in extreme jitter reduction, we care mainly to have a wide range tracking loop that goes wider when un-locked.  So in a sense our loop is already well poised to have good locking times - the question is can we do better with not too much effort ?! (better choice of loop filter values or technique perhaps) ...

why I'm bringing this up is because recent adaptive advances have produced considerable improvements in lock-in times ...

http://www.ece.osu.edu/ie/main/Publications/PLL/tangy_fast_settling_PLL_ASIC2001.pdf

the idea with adaption is that we can use a lock (cycle slip) detector to change the parameters of the loop (VCO rate, charge pump gain, loop filter bandwidth) to make the loop go back into lock more quickly than if we were to leave it in a typical "small-signal" filtering state.  The EMM circuit is adaptive in the sense that it switches in a different time constant in the loop filter - but there's more we can do as this paper shows, or we can do it differently if we have reason to ...

If the locking range figures are already good, I thought we could use a slip detector to simply gate (or time-gate) the clock when in transit between frequencies - where the VCO is known to hunt far and wide if the loop is not properly damped ... to me the sustaining properties are secondary because it seems that part can be cured with a good sustainer/comp circuit and maybe a better placing of the idling frequency ...

Is there a easy way to adapt a CD4046 for a lock detector?

that's what my first link was intending to point to, a cycle slip circuit that produces an astable no-output signal ... not all lock detector circuits are equal in that sense ...

[markusw]

Thanks a lot for your exhaustive explanation !! 
It will require thourough reading. BTW, I found the article you linked too ...but on a first read it was too high....

Again, thanks ......and now for some reading....

Markus

[markusw]

One more Q
how would you

use a slip detector to simply gate (or time-gate) the clock when in transit between frequencies - where the VCO is known to hunt far and wide if the loop is not properly damped

?

You mean that there is no signal from the VCO as long as the PLL hasn't locked in?

Otherwise I will have to read that paper very carefully......

[R.G.]

The CD4046 is unusual for PLLs in general in that it has
(a) a VERY wide range VCO. The VCO in the 4046 can run through a 1000:1 range.
(b) a VERY wide lock range when used with the internal phase comparator 2. The capture and lock range are essentially equal to the VCO range with PC2. PC2 is not your normal phase comparator. It is a frequency discriminator for frequency differences which are sufficiently big, so that above X frequency difference, it stays solidly high or low, forcing maximum slewing rate on the loop filter. Once within a smaller difference, it converts over to PWMing on the filter to get an analog lock. It is ... um, what was that? adaptive? by its very nature. The PC 1 on the 4046 is essentially useless for audio purposes.

These characteristics mean that the 4046 with PC2 does not hunt if you get the filter halfway right. The center frequency almost does not matter as long as the signal to be captured is within the VCO's range. All it affects is the time to lock, and that's driven almost entirely by the filter slew rate.

Audio tracking is a different animal for PLLs. The 4046 and its descendents are about the only things which will track wide range audio. As such, classical PLL theory applies, but barely.

The 4046 is also unique in that its phase pulses output make an almost ready-made lock detector. Some of the 4046 descendents go ahead and produce a locked output.  There's one lock detector in this note: http://focus.ti.com/lit/an/scha002a/scha002a.pdf

All you really have to do is detect when the phase pulses are narrower than X, and that's easy enough to do with a resistor, diode and cap.

Notice that demodulating the phase pulses output of the 4046 lets you be... adaptive... any time you like, since the PC2 network offers a deterministic result for any degree of closeness to locked. However, once you get to PWM on the phase pulses, you're already so close to lock that you'll likely be locked before you needed to adapt much. What you need to know with a 4046 is whether it's solidly above frequency, below frequency, or nearly in lock. These correspond to PC output fully high, fully low, or pulsing.

It always helps to know what the chip you're talking about will do.

[Dan N]

I did a search, but the links I found are dead.

Sad to have that disappear from the web. I uploaded it to Colins. Go here:
http://experimentalistsanonymous.com/diy/
Click the
"UPLOADS" folder and scroll down second from the bottom.

[markusw]

Thanks a lot R.G.!! 

Comparing the logic diagrams for the CD4046 and the HCT7046A the CD4046 could also easily modified for the lock detector found in the  HCT7046A. Does it have any advantage over the lock detector shown in http://focus.ti.com/lit/an/scha002a/scha002a.pdf ?

I did a search, but the links I found are dead.

Sad to have that disappear from the web. I uploaded it to Colins. Go here:
http://experimentalistsanonymous.com/diy/
Click the
"UPLOADS" folder and scroll down second from the bottom.

Thanks for rescuing the file! 

Markus

[askwho69]

Hi anyone has the PCB on this? please Email it to me askwho69@yahoo.com Thanks i advance

[Andre]

Hi anyone has the PCB on this? please Email it to me askwho69@yahoo.com Thanks i advance

[askwho69]

Wow thanks Again! any components foe last time