proposed dr. boogey layout -- seeking comments

[MartyMart]

Hmmm ok. so it thinned the sound out to have the 39k in there? Did you notice a change in the clipping or asymetry?
Can you comment on it more Marty?

Thinking back 18 months to a "sound" is tough !
It just seemed to have less gain and was a bit of a pig to bias, couldnt get it under 6v if I remember
right ?
I dropped the idea after 10  mins and went back to 3k9 or perhaps 4k7 - seem to have LOTS of those !!
I dont often go for all "exact" values - whatever I have will useually do
May be worth experimenting, in a 9v stomp version perhaps the 39k would work better at 12k or so
for this stage.
Like ROG's Thor - they were aiming for a "true" amp response and not "flat out rediculous" like the
T-chief was ! - so they made some adjustments to allow for this

MM

[Pushtone]

Just etched and drilled your layout.
Very compact fit in a BB. Nice work.



As soon as I populate the kids into their beds I'm gonna populate this.


I forgot to leave space on one side for a mounting hole Dam. 
It will be supported on one side.

The pads are on the smallish side. I would think a drill press mandatory to dill this one without lifting a pad or two.
More pad matierial would be nice but not mandatory.

Thanks again.

[John Lyons]

Thanks Marty. I would assume if it the 39K made a big difference in a good way you would have mentioned it before... Has been a while.

Pushtone. I fattened up the whole boards trace in Photoshop, "Minimize" in "other"  in the filters section.
I like big pads as well. Haven't populated the board yet.
Looks pretty roomy in there.

John

[Victor]

Nice layout! 

I'm working on some mods for me (making pcb-mounted pots), but I still have some questions:

- Between Q4 and Q5, there's no coupling cap, should I put one there, to prevent some DC coming from previous to the next stages? Is it necessary?
- And what about a Miller cap on Q5?

If someone had already built the circuit using this layout, please post your impressions about it. 

[John Lyons]

Q5 is a source follower. Basically lowwers the impedance and buffers the Tone controls a bit. No need for a miller cap there as it is not a gain stage and has little gain. No need for a coupling cap their either.

I breadboarded the circuit yeaterday and found that the big place the miller cap make a difference is Q2 and to a lesser degree Q4. Q1 still should have one but if you want to cut some fizz I'd put a 220 or more pf in Q2. I also bumped up the pf to 120 in Q2 for the 20pf to ground.
I used 220pf Gate to Source and 120pf gate to ground.
Start by building it stock and then modify it if need be.

John

[YouAre]

sorry i'm a bit late in this thread...but has the layout been verified? and have the noise issues been resolved? sorry it's pretty crazy and i can't read through the whole thread.

[John Lyons]

Seems like pushtone is close to finishing this layout...
Other than that I'm not sure anyone had built on it.

The noise issue has to do with layout of the pots mostly.
There are many threads about the Dr boogie, this one being shorter than some.
If you read the whole thread here and use this layout here you should be good.

John

[Bucksears]

It would be cool if at the (temporary) end of all of this that we put together a list of the changes made from Electrictabs' version to Gaussmarkov's.
I haven't had any noise issues, so I'm probably going to stick with my board that has additional pads for 'miller caps' and see how they sound.
I might build the newer/enhanced DB later.

- Buck

[audioguy]

Has anyone got a tonestack-less layout? I want to experiment a little.

Thanks!

[John Lyons]

There are only 5-6 parts in the tone stack. Just leave out those parts.
Leave of everything after Q4 and add a cap to the drain of Q4. 1uf should be fine.
The tone stackless build sounds pretty good still.
Just bit louder and more mids and highs asuming you compare it to the regular version with the knobs set at half way up.

John

[audioguy]

Cool, thanks. I have built the full version and I really like it. Now I want to experiment with some different stacks- maybe just a single 1 knob control... we'll see.
Didnt GM have a layout for the stackless version on his site? Looks like its gone now. 

[John Lyons]

Take a look at Jack Orman's "Presence" control. It's a big muff style tone control with High pass, Low pass and A mid control. 2 knobs.
AMZ link above. It's in the Lab Notebook section...

John

[gaussmarkov]

folks,

something just occurred to me and so i am breaking my temporary vow of silence to pass this on.   

when i added the input coupling capacitor and then the biasing resistor per ardic's comments, i kept the biasing resistor at 1M and made the pull down resistor a standard 1M.  this isn't quite right.  these two resistors in parallel, ignoring the coupling capacitor (which is reasonable), make for a combined resistance of 500K.  to get the biasing right, i suggest increasing both to 2M.

somebody, check me on this.

all the best, gm

[Victor]

gm,

I believe that in JFET's DC analisys, the standart autopolarization model leaves the anti-pop resistor out of the "equation", because the input cap is a open circuit in DC. Considering this, we need Rg (1M or greater) to show that Ig equals zero. In AC, the input cap is a short circuit for a center frequency, so the input impedance of the circuit will be the anti-pop resistor in parallel with Rg. And your suggestion of using both 2M2 resistors seems nice, but I'm getting worried about any kind roll-off effect in freq. at input caused by that associaton of R's and the input cap........ 

[Pushtone]

Interesting, a vow eh? 

Anyway,
Q1 biased just fine for me.

It's Q2 thats is giving me biasing problems. It's behaving strangely.
And I kinda painted myself into a corner too.

I wanted to get rid of the trimers for the least noise.
I soldered jumpers from the PCB to a breadboard with four trimers.
Note that I don't have any pots connected yet. I didn't think that would matter.



All the transistors biased fine with the breadboard trimers. A sweep of 0-8.5v. No problem getting 4.5 on any of them.
I metered the impedance of each trimer and soldered a resistor of that value into the PCB trimer location.
I bridged the trimer at pins two and three with the resistor. I kept trimer for Q1.

Q2 didn't do so well in the translation from trimer to resistor.

When the circuit powers up I get 8.5V on the Drain of Q2. But 4.5V everywhere else.
If I touch the Gate of Q2 for a moment with the meter probe, then go back to the drain it meters 4.5V.
Same thing if I touch the output of R5, drain drops from 8.5 to around 4.5
It's stable at 4.5V until the power is cycled off and on, whereby it goes back to 8.5V.

If I hold the meter probe on the drain of Q2 and tap the gate with a metal tool I can get it to bounce around.
8.5V to 3.3V to 6.7V to 2.5V.

I'm going to put a trimer here too I guess, darn one was enough. 

I've reheated all the solder joints. Anything else I should test for?

[John Lyons]

Did the same thing happen when the trimmer was hook up?
The Resistor is just holding a resistance like the trimmer so the problem should be the same for either one. I would suspect the trimmer if that was the case but I a fixed resisistor should be fine and has less to go wrong.

Did you try another FET? That would be my first guess as a problem. They are all over the place sometimes.
The source resistor will change the bias as a second guess. But again I don't know why the resistor whould change unless its a solder joint or solder bridge.
We're rootin' for ya!

John

[gaussmarkov]

gm,

I believe that in JFET's DC analisys, the standart autopolarization model leaves the anti-pop resistor out of the "equation", because the input cap is a open circuit in DC. Considering this, we need Rg (1M or greater) to show that Ig equals zero. In AC, the input cap is a short circuit for a center frequency, so the input impedance of the circuit will be the anti-pop resistor in parallel with Rg. And your suggestion of using both 2M2 resistors seems nice, but I'm getting worried about any kind roll-off effect in freq. at input caused by that associaton of R's and the input cap........ 

ack.  i was thinking AC analysis.  don't we assume, when we leave off the coupling cap that the ac signal is coming in with no dc offset?  aren't we just adding the cap for insurance?  the input resistor to ground is setting input impedance, no?  for the usual coupling cap values, i was thinking of C1 as a short so that we are going from the original 1M resistor (when there was no coupling cap) to 2 parallel 1M resistors (with the coupling cap and its pulldown resistor).  but, again, that's for AC.  waddya think?

Interesting, a vow eh? 

yeah, i'm supposed to be "working."    no fun until the job is done.  don't tell anyone you talked to me, k?

keep up the good work y'all, gm

[Pushtone]

Did the same thing happen when the trimmer was hook up?

No, it worked like a charm with the four breadboard trimers. 4.5V all around.
They all wanted a 33k resistor to bias at 4.5V

Did you try another FET? That would be my first guess as a problem.

Yeah a couple. And I can take the transistor in Q1 thats fine, pop it in Q2 and same result.

Weird that touching the gate will drop it by half?

Putting the trimer in now... back in  ten.





This layout is tight!. Needs smallest capacitors for all values.
The Xicon sub miniature greenies are good ones. That's what I had.

Box caps, especially the ones with the short legs, might be a problem with this build.
The greenies can pack tighter and don't have to be seated all the way down to the board.

[Victor]

gm,

I believe that in JFET's DC analisys, the standart autopolarization model leaves the anti-pop resistor out of the "equation", because the input cap is a open circuit in DC. Considering this, we need Rg (1M or greater) to show that Ig equals zero. In AC, the input cap is a short circuit for a center frequency, so the input impedance of the circuit will be the anti-pop resistor in parallel with Rg. And your suggestion of using both 2M2 resistors seems nice, but I'm getting worried about any kind roll-off effect in freq. at input caused by that associaton of R's and the input cap........ 

ack.  i was thinking AC analysis.  don't we assume, when we leave off the coupling cap that the ac signal is coming in with no dc offset?  aren't we just adding the cap for insurance?  the input resistor to ground is setting input impedance, no?  for the usual coupling cap values, i was thinking of C1 as a short so that we are going from the original 1M resistor (when there was no coupling cap) to 2 parallel 1M resistors (with the coupling cap and its pulldown resistor).  but, again, that's for AC.  waddya think?

Interesting, a vow eh? 

yeah, i'm supposed to be "working."    no fun until the job is done.  don't tell anyone you talked to me, k?

keep up the good work y'all, gm

Adding the input cap for insurance, makes sense, yes.....

And you are also right about the input impedance. Your AC analisys is correct, I believe. 

In DC, only Rg is considered, but it'll only leads to Vgs and Id math (also Vds, but not that important, I think).

[Pushtone]

Putting the trimer in now... back in  ten.

Nope, didn't work. Same flakey biasing on Q2 even with a trimer.
Checking for hairline cracks in traces. Covering traces in solder. Going to bed.

Goodnite!