Common Emitter BJT Calculations Driving Me Crazy!!!

[demonstar]

I am determind to grasp the very basics of designing pedal circuits. I grasped opamps a short while back thanks to the help from some people here. I have since been tackling transistor circuits. I have read just about every article I seem to be able to find and have come out with my own circuit but I can help feeling it's not right.

The schematic is here...

"http://www.aronnelson.com/gallery/main.php/v/Demonstars-Gallery/circuit.jpg.html"

Here's what I was aiming for...

1. I selected a collector current of 0.4mA which from the datasheet which causes a Hfe of 100.

2. I then decided I wanted to place bias the transistor (2N3904) at 4.5V (half the supply) to allow for maximum equal swing both +ve and -ve. In order to achieve this I understood I would actually have to bias the transitor at 5.1V so because it must be 0.6V above the emitter Voltage, right?

3. I then looked at the datasheet and found a minimum Hfe of 100 so divided the 0.4mA drain current by the minimum Hfe (100) to get the maximum base current (4uA). I then know the total current through my voltage divider must be at least ten times the base current so 40uA.

4. Now I know my bias point (5.1V) and miximum base current (4uA) I can solve the two following equations to find the values for the bias resistors...

    1.)     5.1=9*(R2/(R1+R2))
    2.)     9/(R1+R2)=0.00004

I solved these to get...

R1=97K
R2=127K

(R2 being the bottom resistor)

5. Now this is were it gets really sketchy!  I guessed I use R=V/I to get the value for the collector and emitter resistors. So I used 4.5V for each over my collector current (0.4mA) to get 11K3 for both the emitter and collector resistor. (I'm not sure what value I should have used for voltage but don't think it was 4.5V?)

So thats where I am now but so I believe voltage gain is collector resistor over emitter resitor if thats the case I've got a gain of ZERO! Arghh!!! Not Good!!!

I'd really appreciate it if someone could maybe tell me where I've gone wrong. (Hopefully not all of it is wrong.  ) )

I thinks it's the emitter and collector resistors where I've gone wrong.

I'd be grateful of any help because I really want to crack this.

By the way I'm currently part way through As level maths so I can't follow anything too ambitious 

Thanks!

[johngreene]

You want 4.5V on the collector, not the emitter in your configuration. And that only give maximum swing if the emitter is grounded. But let's use that as a starting point anyway.

You want 0.4mA of collector current because of your Hfe selection. That means you want to drop 4.5V of voltage across the collector resistor. So you pick your collector resistor such that:

Rc = 4.5/.4mA = 11.25K

You pick 11.3K, so far so good.

You don't say what kind of gain you would like to get from this amplifier. I'll pick 10.

For a gain of 10 you need to satisfy the equation 10 = Rc/Re (approximate). So Re = Rc/10 = 1.13K

The voltage on the emitter to get our .4 mA of collector current needs to be Ve = .4mA * 1.13k = .452V
To get this on the emitter, we need .6V more than that on the base so Vb = 1.052V

Now you plug this number into your two formulas to get the values of the bias resistors on the base.

hope this helps.

--john

[PerroGrande]

Okay -- A couple of things to keep in mind...

When you say you're looking to achieve "maximum swing", you probably really mean "maximum swing in collector voltage without clipping".  There are really several "maximum swing" points that need to be considered.  This is one of them, but not all of them.  Running the tranny at the mid-point, like you suggested, though, is a good start.   So let's start with 0.4mA of collector current, dropping though an 11K resistor via Ohm's law would leave us expecting to see about 4.5 volts (give or take) on the collector.  These are reasonable starting  points. 

So your collector resistor looks alright.    Now -- let's look a bit more at the rest of the chaos.

Keep in mind that for reasonably high Hfe transistors, the Emitter current is going to be very close to the collector current.  Based on several factors, we can *decide* what voltage level we want the emitter to operate at.  Here is another design consideration to keep in mind...  The input signal (on the base) causes an equal change in the emitter -- minus one diode drop voltage wise.  So a 100mV wiggle on the base will cause the emitter to wiggle by 100mV as well -- but at a quiescent point one diode drop below. 

So -- to select the emitter voltage (and the corresponding resistor), we need to know a little bit about the incoming signal.  For simplicity, let's keep on with the 100mV (amplitude) signal -- it swings 100mV positive, and 100mV negative.  We're going to put that signal on the base -- but we need to lift the base voltage high enough so that the emitter can "track" these changes (down a diode drop) without running into a brick wall and clipping (in this case, the brick wall is ground).  With this example, I need 200 mV of "headroom" for my emitter to swing.  In other words, I've got to set the emitter resistor to show at least 200mV emitter voltage quiescent.

For a variety of reasons (easy math being one of them), I'm going to set the emitter at 1V quiescent.  We know that I need to drop 1V at 0.4mA.  Using Ohm's law, I get R = V/I = 1 / 0.4mA = 2500 Ohms.

I also know that my base voltage wants to be a diode drop above the emitter (1.7V in this case), so I make my divider accordingly. 220K and 51K produce a suitable ratio.

With this combination, I get a gain of about 4.5 and decent headroom.  The gain, as you noted, is essentially the ratio of the collector and emitter resistors.

If I want more gain, I simply adjust the emitter resistor and then make the corresponding changes to the base biasing network.  You can also work from the perspective of Gain as John's excellent example pointed out.  Once you know the collector current you want, use the gain ratio to determine the emitter resistor and work from there.

[demonstar]

OK, thankyou very much to both of you that has really helped! So does the Hfe actually play as big a role as people make out? it doesn't appear to be too important.

Another thing I have noticed is that the some of the volatge across the collector reistor and emitter resistor needn't add up to V+ (9V in my case). This could have been a misconception i had. I can make it work now in my head with the rules you have given me and I'm getting there in understanding. (The mental fog is clearing)

I'm going to try again and aim for a gain around twenty at most.

[R.G.]

The aim of every seasoned circuit designer is to force hfe to NOT matter because it is so variable.

The super-old stompbox circuits like the Fuzz Face where hfe is a determining factor were all designed back when (a) the effects of hfe, (b) the variations of hfe, (c ) the means of designing around hfe were not well understood; further, the people who designed these things were not necessarily the sharpest pencils in the box. Some were very smart guys. Some were... um... well, less well schooled.

You'd have been a standout for recognizing that hfe doesn't matter much in this form of design.

[demonstar]

You'd have been a standout for recognizing that hfe doesn't matter much in this form of design.

Well I've certainly noticed you have echoed this point over and over the last few years over and over again.

I found/am finding the fact that everyone fusses about Hfe can be very misleading to some one taking first steps to understanding elements of circuit design. This really should be nipped in the bud.

Thanks!

[PerroGrande]

Funny you should mention Hfe and non-sharp pencils, RG... 

Ages ago, my dad and I were working on a television for a friend. 

(Aside -- some dads take their kids to the ball game... My dad taught me electronics...  Thanks, Dad!  I can still do electronics, but my slider left me years ago)

After some troubleshooting, we isolated the problem to one particular transistor that had failed.  The replacement (a direct numeric replacement) tested good and worked in simple test circuits, but did not fix the problem.  A second quick look at the schematic revealed that the particular circuit was Hfe-dependent... the replacement tranny wasn't quite high enough.  We went through a handful of replacement candidates until we found one with a high enough Beta and the TV worked.  Sadly enough, this was from a *major* company -- one that should know better!

Demonstar -- don't forget to post your updated design!

[demonstar]

Demonstar -- don't forget to post your updated design!

Cool, will post when i've done it!

[brett]

Hi
Q1 in the fuzzface is such an unusual beast that t gets lots and lots and lots of attention without it being educational as far as other circuits go.

A much more typical gain stage, and one that I use time and time again, is the output stage in the BMP.  It has high input impedance, low output impedance, biases the collector somewhere around Vsupply/2 and is insensitive to the transistor's Beta.  What more could you want?  Hot chocolate in the morning?
cheers

[demonstar]

Here it is back and improved (hopefully!)...

"http://www.aronnelson.com/gallery/main.php/v/Demonstars-Gallery/circuit+2.jpg.html"

I calculate it as having a gain of 15, a collector voltage of 4.5, an emitter volatge of 300mV, bias voltage of 0.9V and collector current of 0.4mA.

That all seem right?

What effect would altering the collector resistor hence collector voltage beside obviously affecting the gain? I guess the current collector current would not be effected as that is independent of the collector resistor value as it is controlled by the current at the base, yeah? would it effect the output impedance?

[mac]

Take a look at:
http://www.diystompboxes.com/biascalc
Hope you find it helpful

A much more typical gain stage, and one that I use time and time again, is the output stage in the BMP.  It has high input impedance, low output impedance, biases the collector somewhere around Vsupply/2 and is insensitive to the transistor's Beta.  What more could you want?  Hot chocolate in the morning?
cheers

Circuits having Re > Rc/2 tend to be hfe, leakage and temperature independent. It is easy to see the reason. Demonstar's circuit varies a lot because Rc >> Re.

mac

[alanlan]

A common mistake (as has been made in this post) is to assume that the collector (or drain) must be biased at 4.5V.  This is probably because people are comfortable biasing op-amps at half supply and assuming the same goes for discrete circuits.  Not so.  It is VCE or VDS we should be interested in *not* VC or VD w.r.t. GND.  Think about what would happen if you made Rc=Re (for approx. unity gain) with VC biased at 4.5V. 

This error is made in the description of the AMZ MOSFET Boost where it says "The dc voltage measured from point A on the schematic to ground should be 4.5v to 5.5v".  Well, if it were set to 4.5V the output would have no negative going signal at all, and 5.5V wouldn't provide for a very symmetrical swing.

Like I said, it's a very common mistake.  Try repeating your calculations with VCE set to half supply rather than VC.  It could be argued that VCE or VDS should be biased at a little higher than half supply.

(In case you're not aware and not wanting to teach anyone how to suck eggs, the convention is for capital letters e.g. VCE to represent DC conditions, capital initial letter with lower case e.g. Vce, Id etc. to represent AC signals superimposed on DC and lower case initial letter e.g. vce, ic, id to represent small signal fluctuations around/about the quiescent DC conditions).

[demonstar]

Circuits having Re > Rc/2 tend to be hfe, leakage and temperature independent. It is easy to see the reason. Demonstar's circuit varies a lot because Rc >> Re.

If this is the case, how would I go about creating anything other than a gain a smidging above unity? Do I have to cascade stages?

[johngreene]

Circuits having Re > Rc/2 tend to be hfe, leakage and temperature independent. It is easy to see the reason. Demonstar's circuit varies a lot because Rc >> Re.

If this is the case, how would I go about creating anything other than a gain a smidging above unity? Do I have to cascade stages?

To be honest, I don't know where Re > Rc/2 is coming from.

What I know is that Beta is the ratio of input current to output current. The base current divided by the collector current. The current through the collector is a function of the emitter resistor and the base biasing. It has nothing to do with the collector resistor so therefore, a common emitter amplifier does not show any relationship between the collector resistor and Beta!

What we do know is that the input resistance of the transistor is equal to the emitter resistance times Beta. So, why do we care about fluctuations in Beta and how do we minimize its effect?

If the bias resistors on the base of the transistor are very large, then the equivalent input resistance of the transistor will have a significant effect on where the base voltage ends up. For example, if your input resistors are two 1 Meg resistors and your equivalent input resistance of the transistor is 100K, then you effectively have 1 Meg//100k for the resistance between the base and ground. So you can hopefully see that as the input impedance of the transistor varies with fluctuations in Beta, the bias of the transistor is going to change. Now if we change the input bias network such that the current following through the resistors (R3 and R4 in your case) is much greater than the current flowing into the base (at least 10x more) then the fluctuations in input impedance has much less influence on the input bias voltage. If the input bias voltage remains constant, then the current through the transistor is (Vb-Vbe)/(RE+Re'). If RE>>Re', then it is just (Vb-Vbe)/RE. It has -nothing- to do with the Collector resistor!

For Beta insensitive designs, a good rule of thumb is to have (using your R #'s) :  (R3*R4)/(R3 + R4) <= (Beta*R2)/10

So the 'problem' with design choice is the less sensitive to Beta you design the amplifier for, the lower the input impedance will be.

Hope this helps.

--john

BTW, this is all DC biasing issues. Once you get it biased, you can increase the AC gain by bypassing the emitter. The transistor will be BETA insensitive as far as biasing goes, and you can increase the AC gain by bypassing all or part of the emitter resistance with a capacitor. The more of it you bypass, the more gain you get, and the more effect Beta will have because the AC input impedance of the transistor is now lower than the DC input resistance. AC gain can also be expressed as A = Beta*(Rout/Rin). The larger Rin is in relationship to Rout, the less effect Beta has. And the lower the total gain.

[JDoyle]

Like I said, it's a very common mistake.  Try repeating your calculations with VCE set to half supply rather than VC.

That is an incredibly confusing way of saying:

Take the transistor completely out of the circuit and determine what the resulting voltage would be at the junction of the collector and emitter resistors, exactly as if they composed a basic voltage divider from the power supply to ground. The voltage that you calculate in this way determines the lower limit of the headroom range for that particular transistor stage (for those following along, this is roughly the voltage when the transistor is saturated, or all the way 'on'). Subtract this lower limit value from the total supply voltage, then divide that result by two: this determines the voltage you want to bias the collector at for the maximum amount of output swing.

See? Described, explained and instructed, without a single confusing mix of abbreviations and confusion over capital and lowercase letters. Just the simple why and how.

I only say this because if they are asking about how to bias a transistor, they obviously haven't yet gotten to the idea of steady vs. dynamic state response of an amplifier stage and have no need to know that nomenclature as it will only serve to confuse them.

It could be argued that VCE or VDS should be biased at a little higher than half supply.

Could it? Or are you actually doing so? If you are going to be publicly announcing that Jack Orman has made a 'common mistake' you sure ought to back that up with why, and you certainly should end with 'it could be argued'! He either made a mistake or he didn't.

If he did, prove it.

Which is it?

[johngreene]

Could it? Or are you actually doing so? If you are going to be publicly announcing that Jack Orman has made a 'common mistake' you sure ought to back that up with why, and you certainly should end with 'it could be argued'! He either made a mistake or he didn't.

If he did, prove it.

Which is it?

Actually it kind of looks like a mistake to me too. Jack has a 2.7K in both the drain and the source. If you drop 4.5V across the drain resistor, then you have to drop 4.5V across the source resistor leaving the MOSFET completely saturated with no input signal. Am I missing something?

--john

[R.G.]

That is an incredibly confusing way of saying:
...
See? Described, explained and instructed, without a single confusing mix of abbreviations and confusion over capital and lowercase letters. Just the simple why and how.

...  If you are going to be publicly announcing that Jack Orman has made a 'common mistake' you sure ought to back that up with why, and you certainly should end with 'it could be argued'! He either made a mistake or he didn't.

If he did, prove it.

Which is it?

Wow, J. Bad day?

[JDoyle]

Actually it kind of looks like a mistake to me too. Jack has a 2.7K in both the drain and the source. If you drop 4.5V across the drain resistor, then you have to drop 4.5V across the source resistor leaving the MOSFET completely saturated with no input signal. Am I missing something?

No, you aren't, Jack made a mistake. (It was more of a challenge to see if alanlan would answer it, I agree completely, I just don't like 'he's wrong, I know it for a fact... it could be argued'-type responses).

The collector/drain in a unity gain stage needs to be biased to 3/4 V+, not  1/2 V+.

The lower limit for the collector is 4.5V in that case because the resistors force it to be, the transistor can't pass any more current then the emitter resistor allows and it sure can't make the emitter resistor smaller, so when the MOSFET is all the way on, and an effective short, the output at the collector can be no lower then the voltage at the voltage divider between the collector and the emitter resistors. Thus, you only have half the supply voltage available with a unity gain transistor stage.

This is the reason for the really odd bias voltage in the Ross compressor. You would think it would be 1/2 V+ plus a diode drop so the input buffer would have the largest swing (remember the base to emitter junction 'eats' a diode drop worth of voltage). But to save money, and running on a dangerous assumption that the input signal wouldn't get larger than 2V, they set the value at 2.5V (56k/27k= 2.9V with a 9V, close enough to 2.5 for this post for sure).

Then they use the same bias voltage with the phase splitter and you can see WHY they chose that value. The emitter is at the same voltage, 2.5V. Now, we know that the current through the collector is almost exactly the same as it is through the emitter (within 1% or less for modern transistors) and because we also know that the value of the emitter and collector resistors is the same, the voltage drop across the collector resistor is the same as that across the emitter resistor, so we subtract that from the total voltage supply and find the voltage on the collector 9V-2.5V=7.5V.

So the set up the collector to be a 3/4 V+ knowing that the emitter resistor limited the lower swing to 1/2 V+, and a nice side effect is that the emitter is then biased to 1/4 V+ and ALSO has the best output swing - creating the best possible phase splitter and because it is the RATIOS of the resistors that sets this, no matter what the supply voltage, it will still bias out to 3/4 V+ on the collector and 1/4V+ on the emitter.

THAT is the reason for the weird bias voltage in the Ross - to give the phase splitter the largest output swing at both its collector and its emitter.

Jack would want to say that the collector should be biased to 3/4 V+, not 1/2.

Regards,

Jay Doyle

PS - John, I know you know all of that, it was for everyone else.

[JDoyle]

Wow, J. Bad day?

I've read some posts that make me think you may have had similar days, my friend... 

And no, not a bad day per se, just a lunch break from a budget meeting...

It just gets to me when folk answer beginner-type questions (not being derogatory or using 'beginner' as a pejoritive, everyone starts somewhere and this is a GREAT and REASONABLE original post) with lingo and abbreviations that you or I or anyone who has been doing this a while would find confusing on the best of days.

Nomenclature is the WORST way to explain any of this hobby to beginners. Is it Vgs(off) or V(th)? Is it beta or hFE? Is it Yfs or gm? etc.

Hell, in the end, we're all just idiot guitarist and it is very possible to explain what you mean in a language that a beginner can understand.

I guess it's a time out for Jay...

[demonstar]

Thanks a lot guys. I think this means then that this design would not be too beta sensitive.

I'll go away ad tweak and fill it out a bit more and see how it works in reality on a breadboard compared to theroetically (very similar hopefully!) then I'll report back.

Again thankyou so much for all the super help!