TILLMAN: HOW TO INCREASE OUTPUT LEVEL?

[Renegadrian]

Folks, My friend likes the Tillman I gave him so much...After all, he chose it amongst all the other boosters he tried...
He asked me if it is possible to have a little more output without changing its tonal characteristics...Maybe with a different pot?
What do you think, is there anything I can do to have some more volume?? do I have to change some components?? THX

[Paul Perry (Frostwave)]

If this is the circuit http://www.till.com/articles/GuitarPreamp/images/preamp.gif you could try halving the 2.2K or doubling the 6.8K resistors - or doing both! - though this will shift the bias a bit.
Or you could whack an electrolytic - say 10uF - across the 2.2K. That's going to lower the input impedance, but most likely not a problem.
That's what I'd try, anyway.

[stm]

Adriano, in order to have more gain without altering the tonal characteristics you should increase voltage to 18V (2 batteries) and change R3 to something between 10k-15k in order to have a drain voltage near 11V so as to maximize the clippng-free dynamic range.  R4 should be increased to 100k so it doesn't affect gain significantly by loading the drain.  Eventually R4 could be replaced with a 100K A or B potentiometer for volume control.

P.D. by the way, the above description refers to the original Tillman circuit, since right now I don't have access to the schem you posted due to firewall restrictions at the office.  I will recheck when I get home later.

[Gus]

A few questions
What supply voltage?
What will the fet gain stage be driving?  What is the input resistance of the circuit the fet stage will be connected to?
How much more gain do you need? maybe you can not get it from one fet stage.  A j201 has an IDSS of .2ma to 1ma so Id needs to be under .2ma if you want to use j201s with out selecting them

This will allow you to DESIGN the fet stage

Look for the vishay fet app notes an102 to an106.  Note the effect the drain resistor and drain current have on gain.

http://www.fairchildsemi.com/ds/J2/J202.pdf

[Ben N]

http://www.diyguitarist.com/Guitars/FET-GuitarPreamp.htm

As noted above, increasing gain will decrease headroom (i.e. cause some clipping), but your friend may like that, since, as Tillman notes, the JFET overloads and recovers gracefully. You can also make this a switchable boost by putting the bypass cap on a switch.

[stm]

As noted above, increasing gain will decrease headroom (i.e. cause some clipping), but your friend may like that, since, as Tillman notes, the JFET overloads and recovers gracefully. You can also make this a switchable boost by putting the bypass cap on a switch.

If you *double* supply voltage keeping the source resistor *unchanged*, and adjust the drain resistor accordingly (i.e. doubling it) you only increase gain by 6dB without affecting headroom or harmonic content.  The Fetzer Valve exhibits such behavior also.

[JDoyle]

As noted above, increasing gain will decrease headroom (i.e. cause some clipping), but your friend may like that, since, as Tillman notes, the JFET overloads and recovers gracefully. You can also make this a switchable boost by putting the bypass cap on a switch.

If you *double* supply voltage keeping the source resistor *unchanged*, and adjust the drain resistor accordingly (i.e. doubling it) you only increase gain by 6dB without affecting headroom or harmonic content.  The Fetzer Valve exhibits such behavior also.

Gotta argue about the 'without affecting...harmonic content' bit of your statement.

Increasing the supply voltage will most assuredly affect harmonic content as you will have brought the JFET's operation further into the 'pentode'/'saturation'/'pinch-off' zone of operation (in contrast to the 'triode' zone on the left hand side of the curves that is normally used in JFET VCR applications) simply via the Vds increase.

Also, how does what you are suggesting NOT change the gm of the stage, and therefore the gain/harmonic content? Especially if you keep the source resistance the same value.

------

For the OP - in all seriousness, unless your 'client' has really high impedence pickups, you may find that both of you like the sound better with a 100k or 220k gate bias resistor instead of the 1Meg in there now. You will certainly have much less noise, by a factor of 10 just due to the resistor, more when you include the JFET. The noise in a JFET stage is dependent on the signal source resistance and is at its least (generally, differs by device) between 10k and 100k.

[Renegadrian]

All right folks, thanks for your answers, here's some more info...
I built it following the vero layout below.
It is going to work on 9v taken from a daisy chain.
My friend changes his set up now and then, but basically he uses a original tube screamer (€€€) and a tube Fender amp.
He needs just some more "gain" but not that much.
"Gain" intended as I wrote above as a increased output level, not distorted sound.



So, you may find that both of you like the sound better with a 100k or 220k gate bias resistor instead of the 1Meg in there now. You will certainly have much less noise, by a factor of 10 just due to the resistor, more when you include the JFET. The noise in a JFET stage is dependent on the signal source resistance and is at its least (generally, differs by device) between 10k and 100k.
1Meg?? No res of that value I see...You mean R1, I believe...Anyway, does that achieve my goal??

and taken from http://www.diyguitarist.com/Guitars/FET-GuitarPreamp.htm
adding a 4.7uF electrolytic capacitor bypass cap in parallel with the source resistor. This increases the gain of the circuit some, but if you want more gain still, you could try using a 10uF cap instead.

How'd you put it in the layout above??

[Paul Marossy]

Funny, I had a thought the other day that the Tillman circuit might make a cool booster pedal, and then this thread popped up. 

The 4.7uF cap will give a lot of gain, 10uF might even be too much. Maybe a 6.8uF might be a good compromise?

[Gus]

Is the Tillman circuit in the link correct?

Id lets take a guess 4.5V across the 6.8K drain R  for about .66ma?

Is the drain resistor really 6.8K with a J201?

Is this build for  piezo or passive coil pickups?

I would increase R3 and R4 if I wanted to use a J201 maybe make R3 22K and R4 470K adjust R2 and cap bypass it for the drain VDC you want.

I am guessing a 22K drain will still give enough "drive" to what ever the fet gain stage is connected to.

[Ben N]

How'd you put it in the layout above??

The resistor to sub a lower value in for lower noise is R1. The bypass cap, whatever value, goes one end on the middle strip, other end to ground.

[Gus]

  Time to google and search

Read about noise in fets a good one is AN106.

  A J201 is even in that PDF look at the 100K to 1G gate resistor range

I would guess the 3.9meg is for piezos.  If used for a passive coil adjust for the loading you want

[Renegadrian]

No piezos, my friend has a G&L ASAT, so standard telly pickups...

[Renegadrian]

How'd you put it in the layout above??

The resistor to sub a lower value in for lower noise is R1. The bypass cap, whatever value, goes one end on the middle strip, other end to ground.

Got it...thx!!!

[Gus]

Did anyone look at the vishay JFET app notes?  Very good PDFs
  First don't get "stuck" with names of circuits like tillman etc.
  Look at the simple gain stages and ask yourself want you want/need, then adjust the circuit.

  Hint.  There are other things you should know for best temp stability (Id vss IDSS reading for the FET in the circuit)and what ever else you want to design for.

[Renegadrian]

Not on the names, I want to be stuck on the vero board I made. So I want to see what mod can I make on an already built board...Which is the Tillman above.

[JDoyle]

The 'Tillman' circuit is just a common source voltage amplifier that happens to have part values listed. Nothing more.

Gus' point is not arcane or esoteric - the circuit built as is will NOT WORK for MANY MANY MANY JFETs and MANY MANY MANY J201s!

Look at it this way -

With a 6.8k resistor on the drain (Rd), if you want the drain (Vd) to sit at 4.5V (ignoring the fallacy that 1/2V+ gives you the largest headroom) the JFET when biased will need to pass:

[(V+)-(Vd)]/(Rd) = Id, the current through the drain

so with a 9V battery:

[9-4.5]/6800 = 0.66 mA

As Gus stated at the TOP of this thread, the Idss range of J201s is from 0.2 mA to 1 mA. Therefore: Any J201 with an Idss of less than 0.66 mA WILL NEVER BIAS TO 4.5V and will be completely saturated before a signal even hits it's gate - at which point the only thing it can do is SHUT OFF (OK, this isn't quite true due to the presence of a source resistor, but certainly good enough for rock and roll, basically there will be a little bit of range (|Vgs| to be exact) at the gate where it goes from 'almost completely saturated' straight to 'OK, now it definitely is completely saturated'). This is a great example of how to get that 'misbiased transistor' sound.

Not only that, but even with an Idss of 1 mA, the top end range of Idss for J201s, you won't have equal swings for positive and negative going signals - the JFET will be able to shut off (positive going swing) with a range from the starting 0.66 mA down to essentially 0, a 0.66 mA range, obviously. But with an Idss of 1 mA, the negative going swing has a range from 0.66 mA up to Idss, or 1 mA, only a 0.34 mA range - essentially HALF that of the positive going swing. This pretty much guarantees clipping for the negative going swing unless you feed it a rather small signal.

What does this all mean? That the majority of J201s won't work in this circuit, and that ZERO J201s will 'completely' work.

However - if you read the application notes that Gus mentioned, you can learn how to build your very own JFET common source amplifier that WILL work as you want it.

NEVER EVER EVER assume that ANY published schematic which includes a JFET will work properly with the JFET that you have in your hand - most likely, it won't.

ALSO -

The VALUE of any source or emitter bypass cap determines the -3dB frequency where the cap bypasses the resistor allowing those frequencies above it to be boosted to the full gain available - it's value DOES NOT set the overall gain of the stage - only those frequencies that get the MAXIMUM gain available from the stage.

Regards,

Jay Doyle

[Renegadrian]

All right, you got me 
You wrote that my tillman shouldn't work!? I built it as is in the layout I posted above...And it works very good! So I am surely missing something...I should read again what you wrote, but first my need is to give some more output (volume) to the good working circuit I built following the layout above.

[wampcat1]

The 'Tillman' circuit is just a common source voltage amplifier that happens to have part values listed. Nothing more.

Gus' point is not arcane or esoteric - the circuit built as is will NOT WORK for MANY MANY MANY JFETs and MANY MANY MANY J201s!

Look at it this way -

With a 6.8k resistor on the drain (Rd), if you want the drain (Vd) to sit at 4.5V (ignoring the fallacy that 1/2V+ gives you the largest headroom) the JFET when biased will need to pass:

[(V+)-(Vd)]/(Rd) = Id, the current through the drain

so with a 9V battery:

[9-4.5]/6800 = 0.66 mA

As Gus stated at the TOP of this thread, the Idss range of J201s is from 0.2 mA to 1 mA. Therefore: Any J201 with an Idss of less than 0.66 mA WILL NEVER BIAS TO 4.5V and will be completely saturated before a signal even hits it's gate - at which point the only thing it can do is SHUT OFF (OK, this isn't quite true due to the presence of a source resistor, but certainly good enough for rock and roll, basically there will be a little bit of range (|Vgs| to be exact) at the gate where it goes from 'almost completely saturated' straight to 'OK, now it definitely is completely saturated'). This is a great example of how to get that 'misbiased transistor' sound.

Not only that, but even with an Idss of 1 mA, the top end range of Idss for J201s, you won't have equal swings for positive and negative going signals - the JFET will be able to shut off (positive going swing) with a range from the starting 0.66 mA down to essentially 0, a 0.66 mA range, obviously. But with an Idss of 1 mA, the negative going swing has a range from 0.66 mA up to Idss, or 1 mA, only a 0.34 mA range - essentially HALF that of the positive going swing. This pretty much guarantees clipping for the negative going swing unless you feed it a rather small signal.

What does this all mean? That the majority of J201s won't work in this circuit, and that ZERO J201s will 'completely' work.

However - if you read the application notes that Gus mentioned, you can learn how to build your very own JFET common source amplifier that WILL work as you want it.

NEVER EVER EVER assume that ANY published schematic which includes a JFET will work properly with the JFET that you have in your hand - most likely, it won't.

ALSO -

The VALUE of any source or emitter bypass cap determines the -3dB frequency where the cap bypasses the resistor allowing those frequencies above it to be boosted to the full gain available - it's value DOES NOT set the overall gain of the stage - only those frequencies that get the MAXIMUM gain available from the stage.

Regards,

Jay Doyle

or, said another way, use a trimpot instead of the 6.8k to find out what value would work best, or even leave the trim pot in. I find that a 15k in place of r3 and a 1k in place of r2 makes most j201's bias correctly. I've heard it said elsewhere above, but I'll say it again, if you want more volume, connect a 47uf cap in parallel to R2.

I don't understand why such a simple question would get such non-laymans term answers, but this is all simple stuff and the OP probably doesn't care about idss or anything like that.  Equations such as "[(V+)-(Vd)]/(Rd) = Id," are correct, but let's face it - we are guitarists. Let's make it easy enough that my 8 year old could understand without opening a calculator.

He wants more volume out of a given schem. Easy.  If you can't get it to bias, connect a pot (as a variable resistor) in place of R3. adjust until it is at it's loudest point. For more volume, connect the cap to R2. If you go under 22uf you'll start affecting the eq of the boost, so I'd make sure you were over 47uf to boost all frequencies fairly evenly.

Make sure you use a volume pot on the end rather than R4 and you can control the amount of volume. Actually, I prefer to run them before the jfet.

bw

[Renegadrian]

Brian, thank you for your reply - you understood the case - I am a builder with a straight approach, no multimeter reading sessions, no math equations - just build from a given an verified layout.
You fully and clearly understood and answered my need, see, I don't want/need to learn equations or other stuff like that (at least for now, but I never liked that approach...) - so your hints are so precious and easy to follow - that's what I'll do!!!