How much gain is high-gain? Jfet SRPP etc help?

[Sofl]

I'm looking at the Dr Boogey and thinking about how to re-design it to be trimless, ie, plop in just about any average J201 and it will deliver a consistent result without having to twiddle the drain pot. I can do this and get a gain of approximately 12x.... but taking into account the variations in J201 characteristics, each Dr Boogey stage can have between 10x and 50x gain.

So, is 10-12x enough gain (per stage) for a high-gain pedal like the Dr Boogey?


Second, I've been trying to take the same design philosophy and apply it to something like an SRPP or mu-amp gain stage, but I'm having a bear of a time finding out how to go through the design process for a Jfet and not a tube! Can anyone point me in the right direction? I've been spending a lot of time on John Broskie's site (tubecad.com) and have learned a lot, but he designs for tubes, and I'm having a hard time converting those equations from Tube to Fet.

So can anyone help me understand how to design an SRPP or mu-amp gain stage for a Jfet? Or point me in the right direction for converting tube design equations into something I can use with Jfets?


Any help you can give me is greatly, greatly appreciated. I've been spending a lot of time scouring the 'net and poring through audio textbooks trying to have a deeper understanding of audio electronics, but many things are still eluding me.  =)



Sofl

[R.G.]

I'm looking at the Dr Boogey and thinking about how to re-design it to be trimless, ie, plop in just about any average J201 and it will deliver a consistent result without having to twiddle the drain pot. I can do this and get a gain of approximately 12x.... but taking into account the variations in J201 characteristics, each Dr Boogey stage can have between 10x and 50x gain.

You've happened onto one of the basic design techniques for analog electronics. The way you design things to be trimless is to design them with some form of feedback to force the gain to be dependent on the passive parts and not the active parts. All active parts have variation. JFETs have more variation than most other parts. Hence they need feedback for predictability more than other parts. It's the nature of feedback to trade away higher but uncertain gain for lower gain with predictability.

I actually remember the classroom lecture from H. Jack Allison back in 1972 where he pointed out to us that a gain of around ten was all that was practical to get in a predictable, stable fashion from the bipolar transistors of the day, given the vagaries of gain variation, temperature variation, part tolerance, and so on. I find it a bit nostalgic that you've come up with a similar result for JFETs.

Another interesting if unrelated result is that stabilizing gain with feedback also hides the unique nature of distortion that a device may have lurking inside. Feedback by its nature forces the signal to not depend on the device's quirks. Those quirks are what gives it a unique sound.

So, is 10-12x enough gain (per stage) for a high-gain pedal like the Dr Boogey?

Whether it's enough or not is a matter of taste, I guess. I don't consider 10x to be a lot of gain, but that's just me.

Second, I've been trying to take the same design philosophy and apply it to something like an SRPP or mu-amp gain stage, but I'm having a bear of a time finding out how to go through the design process for a Jfet and not a tube! Can anyone point me in the right direction? I've been spending a lot of time on John Broskie's site (tubecad.com) and have learned a lot, but he designs for tubes, and I'm having a hard time converting those equations from Tube to Fet.

That's at least partially because JFETs are not tubes. If it were that simple, JFETs would have been used in industry more than they were. Do not fall into the trap of thinking that JFETs are just tubes but a little different. Vishay/Siliconix has an app note somewhere on how to design JFETs for predictable biasing and gains, but I never found the procedure to be much use. Maybe it's more useful to someone else. I guess, put another way, using a tube design philosophy for JFETs is problematical because JFETs are not tubes, however much we'd like them to be.

Any help you can give me is greatly, greatly appreciated. I've been spending a lot of time scouring the 'net and poring through audio textbooks trying to have a deeper understanding of audio electronics, but many things are still eluding me.  =)

I feel the same way. I've been poring through semiconductor, circuit, and audio textbooks for the better part of forty years now for that deeper understanding. But many things still elude me.

[Sofl]

You've happened onto one of the basic design techniques for analog electronics.

"Basic design techniques"... *grin* I thought I had a relatively decent grasp of the theory behind designing audio circuitry, then couldn't understand why I had such a hard time deciphering the schematics I found on the net. It was only after realizing things like common component values and how one had to design around 'em that I realized just how much I had yet to learn...  *realization - the real world effs everything up everything I learned in school!*

Another interesting if unrelated result is that stabilizing gain with feedback also hides the unique nature of distortion that a device may have lurking inside. Feedback by its nature forces the signal to not depend on the device's quirks. Those quirks are what gives it a unique sound.

I've looked at feedback as one way of smoothing out device characteristics, a la the Trioderizer, etc, but haven't designed using the technique (yet). This has been more from a lack of experience and knowledge and how to precisely understand/use negative feedback than anything else, I think. Again, so much to learn!

Whether it's enough or not is a matter of taste, I guess. I don't consider 10x to be a lot of gain, but that's just me.

Okay, fair enough. I've felt like I need to have a goal to shoot for, otherwise I'm just treading water. If you don't clearly define your goals, how can you possibly achieve them, y'know? So I'll aim for something higher.... I think I'm beginning to understand how the SRPP works, and am thinking that maybe just loading it waaay down might help me get into "high gain" territory without going too crazy...

That's at least partially because JFETs are not tubes. [...] Vishay/Siliconix has an app note somewhere on how to design JFETs for predictable biasing and gains, but I never found the procedure to be much use. Maybe it's more useful to someone else. I guess, put another way, using a tube design philosophy for JFETs is problematical because JFETs are not tubes, however much we'd like them to be.

I was worried that someone was going to interpret my remarks that way! I see a parallel between tubes and Jfets because of how they operate (ie depletion mode) but after a bit of time trying to figure out the plate resistance of a J201 I've realized that no, Jfets are not tubes, and that I need to be careful in how I interpret tube equations.  =)

I have indeed read that note, and have studied it intently. I understand the basic procedure and have found at least one implementation of it (ie Trimless Jfet Amplifier, I think its called, found it somewhere, forgot who to give credit for the schematic to....  *apologies* ). The basic idea is to balance a larger value of Rs with a gate bias voltage. The big disadvantage is that you go from what can potentially be 30-50x gain to something very much more modest, ie 10-15x.... but that's with a high-gain Jfet like the J201. The gain reduction in an MPF102, for instance, is even more drastic, and my concern is that it puts me out of reach of "high-gain" territory.

Any help you can give me is greatly, greatly appreciated. I've been spending a lot of time scouring the 'net and poring through audio textbooks trying to have a deeper understanding of audio electronics, but many things are still eluding me.  =)

I feel the same way. I've been poring through semiconductor, circuit, and audio textbooks for the better part of forty years now for that deeper understanding. But many things still elude me.

Uh oh.... in the words of Bender from the show Futurama.... "we're boned!"

I've read a good deal of the information and documents you've put out there, and I am very appreciate of your insight so far - for the love of all that's good in the world don't give up any time soon!



Sofl

[ubaid88]

i have already discussed that, here you go. You will get some more info here.
http://www.diystompboxes.com/smfforum/index.php?topic=80166.0

Dr Boogey with SRRP.
http://img687.imageshack.us/i/mesarevised.png/

It is a tonestackless version. Iam currently working on a better tonestack, that can do mid scoop and filter highs. I will update you guys with my results.

[R.G.]

I think I'm beginning to understand how the SRPP works, and am thinking that maybe just loading it waaay down might help me get into "high gain" territory without going too crazy...

Oh, sorry, I meant to talk about SRPP. The trick to getting high voltage gains with either tubes or JFETs, or bipolars for that matter is to have high impedance loads. Each of these devices has a fixed amount of current change they can make happen in their range of input voltages. If that current change happens into a low impedance, the change in voltage across the impedance is small. If that current change happens into a high impedance, the voltage change is large.

The problem is that we can't use simple resistors for the loads. If we do that, the DC voltage across the load impedance gets big too, bigger than the tube/FET/transistor can handle. So we use active loads, which have a much bigger AC impedance than their DC impedance. The actual load on a mu-amp or SRPP bottom transistor is the gate of the upper device and its bias network. The upper device makes its source, and hence the drain of the lower device follow with great current gain the drain of the lower device. This relieves the loading on the lower device drain, and lets its AC gain be higher. The difference between mu-amp and SRPP is that the mu-amp output is also loaded by any output which senses that voltage gain. The SRPP has an isolation resistor to let the upper device supply the current to the output load and still keep the loading away from the lower drain.

In both, the output voltage is set by the bias of the upper device's gate and the amount of Vgs that it needs to be able to let the DC current needed by the lower device flow. It's simplest if the Vgs is small, and this is why many people like the J201 - it has a notably small Vgsoff, so any active Vgs is even smaller.

Uh oh.... in the words of Bender from the show Futurama.... "we're boned!"

I prefer to think of it as a lifetime filled with purpose. 

[Sofl]

Oh, sorry, I meant to talk about SRPP. The trick to getting high voltage gains with either tubes or JFETs, or bipolars for that matter is to have high impedance loads. Each of these devices has a fixed amount of current change they can make happen in their range of input voltages. If that current change happens into a low impedance, the change in voltage across the impedance is small. If that current change happens into a high impedance, the voltage change is large.

The actual load on a mu-amp or SRPP bottom transistor is the gate of the upper device and its bias network.

Design goals :

. Create a Dr Boogey clone that uses other FETs than J201's, for our brethren who do not have access to them.
. Design each stage with a relatively consistent amount of gain across an acceptable spread of device characteristics.
. Design each stage with an output impedance that will allow tone controls to selectively load certain frequencies down.
    ( I believe this is part of creating a more dynamic overall tone. Could be wrong.  *grin* )

It seems like lowering the impedance of the bias network, having a lower value of the load resistor (RL), and in the case of the SRPP, having a low value isolating resistor between the two FETs are the prime candidates for this last goal.

I am running some numbers and seeing what I come up with.... I'll post the results in a while, as time allows.

I prefer to think of it as a lifetime filled with purpose. 

Doesn't that sound so much better? *grin* Happily, this is a subject I can finally devote a great deal of attention to and be engaged on in many levels.


Sofl

[Caferacernoc]

". Design each stage with an output impedance that will allow tone controls to selectively load certain frequencies down.
    ( I believe this is part of creating a more dynamic overall tone. Could be wrong.  *grin* )"

And also power amp distortion?   Heh  heh

[Sofl]

". Design each stage with an output impedance that will allow tone controls to selectively load certain frequencies down.
    ( I believe this is part of creating a more dynamic overall tone. Could be wrong.  *grin* )"

And also power amp distortion?   Heh  heh

I'm sorry, I don't understand what you mean. My understanding is that in general power amp tubes have a higher output impedance than SS power amps, and this seems to emphasize speaker frequency response.... I'm basically looking at the same thing from the perspective of a JFET output stage into different RC networks. I still have much to learn, please bear with me.


Sofl

[Caferacernoc]

[/quote]

I'm sorry, I don't understand what you mean. My understanding is that in general power amp tubes have a higher output impedance than SS power amps, and this seems to emphasize speaker frequency response.... I'm basically looking at the same thing from the perspective of a JFET output stage into different RC networks. I still have much to learn, please bear with me.


Sofl
[/quote]

Right. I agree with what you are trying to do. Emulate the responce of the output transformer coupled to a reactive speaker impedance. Good idea.

[brett]

Hi

Emulate the responce of the output transformer coupled to a reactive speaker impedance. Good idea.

I suspect that an effective way to do this is to use a small transformer.  e.g. wall wart.  I've re-wound wall-warts as BJT output transformers in small amps (1 to 5W) and liked the results.  Smaller transformers (e.g. 42TM series) are potentially suitable for stompboxes, driven by SS JFETs or BJTs.  Both Class A and Class AB are easy to set up.  Although the spec sheets for the 42TNs and similar show a narrow frequency response (e.g. 300 to 5kHz), this is for full power (e.g. 300mW).  At one tenth power, the bass response is about 10 times lower (e.g. 30 Hz at 30mW). 

Although I don't have any evidence, I believe that at least some of the magic in valve amps is due to the frequency changes that occur near saturation.  At low volume levels, valve amps are "flat", but when cranked they become responsive, and emphasise the mid frequencies (simlilar to the human vocal range? 200 Hz to 4kHz ?).  Many classic valve amps have relatively low power output and small, easily saturated output transformers (e.g. Marshall 18W, "Deacy" 1W).
just my 2c...

[PRR]

> trying to figure out the plate resistance of a J201 I've realized that no, Jfets are not tubes

They "are". They are Pentodes with secret screen-grid. They have Mu of around 500.

This means the plate resistance is FAR too high to be a useful parameter. Take common JFET with Gm=1,000uMho near 1mA. Cathode resistance is 1K. Plate resistance is 500K. To "match" that, we propose a 500K load resistor. Times 1mA, this needs 500 Volts across the resistor, plus a "few" Volts across the JFET, 500+V power rail. And if the 1mA bias current drifts to 0.9mA, the 500K drops only 450V, the JFET feels 50+few Volts, which may be over its rating.

In a medium-Mu triode, you can strongly influence current with load resistor. With very high Mu devices, you usually can't. (With vacuum pentodes, you can influence current with the screen grid. Its Mu to cathode is generally 10 to 40, has some effect.)

You set a JFET's current with a cathode (source) resistor.

If Gate-Source voltage at typical current were "known", like the 0.6V of a BJT or the 1V of a 12AX7 at many useful biases, the math would be trivial. But we only know these things:

Idss: the current at zero bias, expressed as a range, and often a 4:1 range (4mA-16mA). You can run the JFET at any lower current, but not higher.

VGS(off) or Vto: Gate turn-off voltage, expressed as a range, and often a 4:1 range (2V-8V). This is the voltage to turn-"off" the JFET (where "off" is defined as some small current, IIRC often 50uA).

J201 datasheet: http://www.fairchildsemi.com/ds/J2/J201.pdf
Idss = 0.2mA to 1.0mA
Vto = -0.3 to -1.5

Right away, we see that if we want to run over 0.2mA, not all J201s will do it. If, like me, you pencil "1mA" on every stage as a starting point, the J201 is not the part to stock.

And you may not want to pencil 0.2mA. Some J201s will need zero Volt bias, and others could need a large fraction of the 1.5V Vto to slug them down from their 1.0mA Idss. Pencil <0.1mA. Or use a different part.

Cathode resistor may be plotted on the transfer characteristics:


This is for the higher-conductivity batch of J20x parts. The low-conductivity J201 will be lower voltage and current, but same trend. The curve is plotted for 10Vds, but will (because of huge Mu) be generally valid as long as Vds is greater than Vto and less than breakdown.

I've plotted 2V and 20mA or 1K source resistor. Different parts may bias at 7mA or 14mA. This uncertainty is acceptable in many consumer RF amplifiers, manageable in small-signal audio, but makes large-signal (distorter) bias vary from unit to unit.

If you need *exact* bias current, stuff a constant current source under the Source.

For "good enough" bias, first decide what is good-enough. 20% variation? So you want about 5:1 extra bias voltage to "swamp" the Vto variation within 20%. OK, now note that these parts biased at half the lowest Idss (10mA in the plot, so aim for 5mA), need Vgs of 0.9V to 2.7V. That is a 1.8V range. You want 9V excess bias, plus 1.8V, say 11V bias at the Gate. You have about 12V across the source resistor, at 5mA, is 2K4. Since Vt may be 4.5V, you need the Drain sitting above 12V+4.5V= 17V. While you can set B+ higher than breakdown, it is safer if you don't, not even too close. Taking 34V supply and 17V at Drain gives 17V across the load resistor, at 5mA is a 3k3 load resistor. The 2K4:3K3 resistor ratio gives cathodyne-like DC stability.

But it is mighty hard to do such extravagant biasing in 9V boxes.

> Dr Boogey ...how to re-design it to be trimless

The Dr knows his stuff. Little systems with JFET and 9V power don't have consistent bias without trims or much more complexity. Since most anything you can do with a JFET can be done another way, the reason to do a JFET is simplicity.... but if you gotta shimmy it up with current sources and other foo-fah, simplicity is lost. The trimmer is a good compromise for DIY (pots are cheap and labor is free).

Actually... the Boogey is Mu-follower. That's an interesting plan. It is impractical with vacuum tubes; not impossible, but there is always a better way to use more tubes. With JFETs, if both of a pair are matched, and both source resistors the same, it ideally biases right to the middle.... but the Mu=500 means that 0.2% mismatch matters. Boogey mis-matches the resistors to get a consistent asymmetry, not the same unit-to-unit but generally musically useful. Gain is slugged-down with resistors (R7+R8, R10), but still VERY high. I think the goal is some "minimum" overall gain. If a specific box has more, the user may turn-down the Gain knob.

Stuff like this is designed empirically, with pick in one hand and soldering iron in the other. It could take forever to compile and compute data on various JFETs at these low voltages, and you still don't know what it "sounds" like. Tack-and-try cuts the BS and gets to "an answer".

[PRR]

> is 10-12x enough gain (per stage)

It's three stages. There's small loss networks, but 10*0.5*10*0.5*10 is gain of 250 overall. For 9V battery and asymetric biasing, you can't get over 2Vrms out, so 8mV input will clip it. That's not super-gain, but it aint deaf either.

Are you sure about stage gain >10? Even with loading and meagre voltage, I'd guess higher.

> the plate resistance of a J201

BTW: just like a vacuum tube, you can read this right from the curves:


The top plot suggests several to many K-ohms. And this is the range where Vds is <=Vgs(off), where the plate resistance is low. Those curves get very flat at higher Vds.

The other chart gives plate conductance, the reciporocal of plate resistance. The red dot is about 20K plate resistance. Note that Rp improves some with Vdg and varies strongly with current. Just like Gm does. In fact it is better to think about Mu than any plate resistance, and remember that in most resistor-loaded amplifiers, neither Mu nor Rp matters because load impedance swamps it.

[Sofl]

Wow, this is a lot of information all at once. A good portion of it isn't new, but that last part about the plate resistance is completely new, and will probably take a few days to completely sink in. I am very grateful!

> The Dr knows his stuff. Little systems with JFET and 9V power don't have consistent bias without trims or much more complexity.

I've read the Siliconix app that talks about biasing and how to bias for gain variations... basically, since the mu-amp is already adding a bias at the top jfet, it isn't much more difficult to add a bias to the gate (ie voltage divider). Pick the right values, and you achieve a steady gain figure over a decent spread of device characteristics. Trade-off is that you have to sacrifice gain to do it.... dropping to 10x isn't cool, so if I incorporate that same principle into a mu-amp or SRPP I've got the potential to get that higher gain back.


Are you sure about stage gain >10? Even with loading and meagre voltage, I'd guess higher.


I've taken it as far as getting a consistent 13x gain from a wide variety of J201's in a common source amplifier. I could do much better, but that would mean my gain figures would vary (ie not as dependable). As I mentioned briefly earlier, the way Dr Boogey is set up now, the gain can vary between 10x and 50x per stage.... After seeing that, my first reaction was that that large of a spread was unacceptable.

I want to be able to design around component values, I want to avoid having to look (and having those interested in my pedals look) for the "magic part" or the part with the magic values to make it work. I want "plug and play" functionality with my design - ie, if you can follow a schematic then there is no guesswork or knob-twiddling - it just works.


You have to remember that I'm in a quandary. I have no access to my electronic equipment, and it sounds like I won't for several weeks, if not months! So to keep myself from going crazy, I'm studying and learning instead. Along the way I want to challenge myself, which means setting goals like "tweak Dr Boogey to use different jfets and supply voltage" and "develop a mu-amp or SRPP that gives me trimless operation over a certain device spread".


I've got LTSpice now, I've got a binder full of reference documents, equations, schematics, etc, and I've got Google. And you wonderful people here, of course - so that means I can do it. Might take me a while, but I can do it.


Sofl