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Jfet bias

Started by petemoore, June 17, 2010, 08:50:22 AM

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petemoore

    Modified post and MPF102 circuit...
  It appears getting the source resistor down to where...
  it's not too low etc. Did the trick just find so far, I could finer-tune it if I felt like it, and might even attempt that math again now that I'm 1/2 knowing which way makes 'up-when'...
  So, plenty of boost, very nice, BMP output is increased by the 10% estimates goal with volume adjustable well above that.
  Basically the goals are being met, the learning curve could be a little quicker but at least slow-mo is better than no motion.
  I got stuck looking at that 100k trimpot on the Fetzer drain, thinking for some reason I needed a 'large' >22k or so resistor there.
  It's for a distorter, so no big deal, it's distorting and pushing the amp very well indeed. I think whether it sounds like a triode is immaterial here.  
Convention creates following, following creates convention.

petemoore

  Same thing
Convention creates following, following creates convention.

petemoore

  Trying to decode and cypher the math at Fetzer article abbreviations.
 Is square law the inverse of "inverse-square-law" [wiki has isl information:
  http://en.wikipedia.org/wiki/Inverse-square_law
  Consider this:
a. linear circuit = unity or 1.0 exponent
b. triode = 1.5 exponent
c. JFET = 2.0 exponent
d. JFET with "magic" Rs and no bypass cap = 1.5 exponent around the operating point

What is an 'exponent' ?
  http://www.thefreedictionary.com/exponent
   A number or symbol, placed above and to the right of the expression to which it applies, that indicates the number of times the expression is used as a factor. For example, the exponent 3 in 53 indicates 5 × 5 × 5; the exponent x in (a + b)x indicates (a + b) multiplied by itself x times.

  Whew...
  I know I might want a Jfet after my BMP, about to put a Mu amp there and see if I can get:
 MPF102 in a stratoblaster [or whatever] type configuration...
Drain 2.6v
Source 2.5v
Gate .01v
 To look more like:
Source above gate by some amount [I have that,^].
Drain about 1/2v...I'm getting this with 7k5 drain and source resistors, Gate has a 470k to gnd.
I'm not sure these bias points will provide any gain, I'd like a bit more output...
 and some kind of Jfet tone here, more can be known after I actually put a Jfet in this position...any suggestions welcome !
 Any math penetrating comments like say "smaller resistors = more current" or anything else related to 'a direction'.
 Since I haven't been able to wrap a handle on a Jfet by the available means and this Stratoblaster insists on teaching me something, perhaps fiddling with an un-biased circuit such as this will give me an idea of what direction a resistor should go, what direction a voltage will move when said resistor changes.
  Back to Fetzer cypherin'...
Convention creates following, following creates convention.

petemoore

  Perhaps anything with charts would put me on to the 'math directions' 'up or down' 'when'...type stuff.
  I know there are threads, I'm searching them too.
Convention creates following, following creates convention.

R.G.

Quote from: petemoore on June 17, 2010, 08:50:22 AM
 What is the definition of vocabularies here ?:
Idss = Current in the drain with gate shorted to the source. This is the largest DC current the JFET will normally pass. If you short the gate and source terminals (duuuh...) and put a voltage across drain and source+gate, this is the current that flows.

 Vcc = I think this is the supply voltage; not too sure where that equation came from.

 Vp = pinchoff voltage for this JFET

In biasing a JFET, the thing which sets the drain current is the gate-to-source voltage. JFETs are depletion mode devices; if the gate-source voltage is zero, they flow maximum current. You have to do something to the gate-source voltage to turn them off. This "something" is reverse biasing the gate-channel diode. So for an N-channel device, you make the gate negative with respect to the source. At some point, the negative gate voltage will completely choke off the current and the JFET is off. This is Vgsoff.

Generally, Vgs is set by grounding the gate through a high value resistor (remember - the gate is a reverse biased diode, so even with big resistors, the voltage across the resistor is nominally zero) and connect the source to ground through a resistor. Current does flow through this resistor and raises the source above ground. The gate stays at ground, so the resistor causes the source to be higher than the gate, and introduces a reverse bias on the gate.

This reverse bias causes the current to be lower than Idss. This lowers the source voltage and lets more current flow. It's a negative feedback setup much like the bias on a triode or pentode, which are also depletion mode devices. The voltage and current settle where the current provides just enough voltage elevation to the source to make the gate source voltage be negative enough (for n-channel devices) to make that current flow.

The big issue here is that Idss is different from JFET to JFET of the same type. So is Vp. So is the transconductance, the ratio of how much a change in the gate-source voltage changes the drain current. These are all interrelated by the device physics, which is nice, but in a way that makes it very complex and variable from device to device as to where a given bias network will make the currents and voltages settle.

Quote from: petemoore on June 17, 2010, 09:12:19 AM
 It's basically a Stratoblaster starting with a 7k5 source resistor.
 I get the drain to 1/2v using a 7k5 or so drain resistor.
 Will this setup provide gain ?
Probably not. If the drain is at 1/2 of the supply voltage (If I understand you correctly) with a 7.5K resistor, then the source will also be at 1/2 the supply voltage. Remember that the same current flows in the drain as the source; the gate is effectively an open circuit. So if the drain is at 1/2 the power supply, the source is too, and the device is saturated; no amplification can happen.

Even if the device is not saturated, if you have equal source and drain resistors, the gain must be one unless you bypass the source resistor. This part is just like with bipolars.

QuoteWill a drain which is very low voltage bias [.2volts or .4v above the source] provide gain and be fairly symmetrical ?
I'm not sure exactly how to parse that. The voltage between drain and source doesn't say much about gain. It just says that the total signal swing is limited.

It's not going to be symmetrical. You can turn it on only another .2-.4V. But you can turn it off the full rest of the power supply.

R.G.

In response to the questions in the forum - PCB Layout for Musical Effects is available from The Book Patch. Search "PCB Layout" and it ought to appear.

petemoore

    Rs = 0.83 * |Vp| / Idss
  This seems like a good starting point.
  Rs = 2k1
  With
  Rd = 3k6, Drain is 1/2v.
  A little better.. or is it...than trying it with a large source resistor ?
  The large source resistor made it necessary to have the large drain resistor.
  Prehaps even smaller value'd help the source.
  I've not seen values shown larger than 12k for a Jfet source [ie Stratoblaster...kinda where I started ending up with the big source = drain resistor values], so I guess I should keep going smaller here and see what that does.
  Having no idea what goes where when and which R raises voltage in relatiiong to the tont ehwonthermeriershare ednsaduent ehermemt ai bvolband voltage gain viamuamp seems llogcial compared to this stuff.
   
Convention creates following, following creates convention.

phector2004

thanks for the easy explanation, R.G.!  :)

petemoore

#7
  I'm happy that it is easy for you and RG to understand, I was hoping someone would come along and point out how easily this is understood.
  I feel like I can contemplate how it actually works, Rs has to be a certain value which Rd can help decide.
  I'm having trouble reading or working most of the math equations.
  I'll try to hammer some comprehension of the numbers beyond ''get some gain by diddling with the Rs and Rd so the gate is biased above source sufficiently/and there's sufficient gain.
  It seems the smaller the source resistor the easier it is to get a 1/2v which allows the Rd to be larger than the Rs...too small and the gate isn't biased above the source.
Convention creates following, following creates convention.

phector2004

#8
It's not that easy to understand, I'm still "getting there", but I know just a little bit more about JFETs. They're like sphincters, but for electrons :P
sorry for the misunderstanding, but I'll still give this a shot!

I'm trying to simulate this, but I'm clueless of how to see what's going on when I try SPICE and the other sim I'm using doesnt seem to like me...

Either that or RG's right about the gain being 1 (he probably is, but lets assume he isnt!), cause I plugged in the calculated Rs and Rd values for an MPF102 in a Fetzer deluxe and I'm getting a clean 766mV from a 1V 220Hz AC signal. I even doubled the voltage to source and its still at 766mV...

Looking at the formula in section 7:

Av = 0.5 (Rd/Rs)
Av = 0.54 (Vcc/|Vp| - 2)


Plugging in 9V for Vcc and 2.34 for |Vp| (based on the average values stated on the bottom),

Av = 0.54 (9/2.34 - 2)
Av = 0.54 (3.85 - 2) = 0.54 (1.85) = 0.999


Doubling the voltage should yield:

Av = 0.54 (18/2.34 - 2)
Av = 0.54 (7.7 - 2 ) = 0.54 (5.7) = 3.078


But it doesnt double in the sim... unless you play with Rd. How to do this mathematically, I don't have a clue.

I guess at this point, to go on, it's best to figure out the current so we know how to calculate our resistances by V=IR

Section 5 gives us:
Id = Idss (0.44 Vcc - 0.78 Vp) / (Vcc - 2 Vp)

with Idss for an MPF102 ~ 5.65mA,

Id = 5.65x10-3A ( 0.44 (9V) - 0.78 (-2.34V)) / (9V - 2 (-2.34V)
Id = 5.65 x 10-3A (5.79V / 13.68V) = 2.39 x 10-3 A = 2.39 mA


So lets say you'd like to figure out Rs, you can use V = IR to get the resistance:


Vs = Vp(0.37 Vcc - 0.65Vp) / (Vcc - 2Vp)
Vs = -2.34V (0.37 (9V) - 0.65 (-2.34V)) / (9V - 2( -2.34V))
Vs = -2.34V (0.35) = -0.819V

R = V/I
Rs = 0.819V/2.39 x 10-3A = 343Ohms


That gives a general ballpark figure for Rs

Now I personally think that Rd can only be a certain value that Rs allows. Anything too high and the gate won't be biased above the source. Not 100% sure, cause Im still new to electronics, surely the gurus can help. At this point, I'm guessing using the Rd formula in section 5 should have it bias properly with the given Rs, but i have NO IDEA WHATSOEVER how the coefficients in the formulas were found.

anyways, i'm mathed out for a day. good luck!


BubbaFet

I'm sure that it is just me, but frankly, I can make great sense from Yoda's reverse English, but not so much from petemoore. Stream of consciousness musings, taken out of an esoteric frame of reference, is a cypher I find myself not willing to spend any time decoding. Perhaps I should down a few Pangalactic Gargleblasters first.  ??? :-\ This Earth world is strange indeed....

WangoFett

Quote from: phector2004 on June 17, 2010, 02:35:26 PM
They're like sphincters, but for electrons :P

I am totally adding a Sphincter Control to an effect now.

phector2004

I just looked it over again, and you can set the gain from the very first formula I mentioned(Av = 0.5(Rd/Rs)) by rearranging, throwing in your desired gain, and plugging in the calculated resistance

i.e. For a gain of 10,

2Av = Rd/Rs
Rd = 2AvRs
Rd = 2 (10) (343 Ohms)
Rd = 6.8k


I'll try it out tomorrow morning, hopefully someone more knowledgeable can help till then!

teemuk

QuoteConsider this:
a. linear circuit = unity or 1.0 exponent
b. triode = 1.5 exponent
c. JFET = 2.0 exponent
d. JFET with "magic" Rs and no bypass cap = 1.5 exponent around the operating point
What is an 'exponent' ?


1) Triode following three-halves law ( ^1.5) , 2) JFET without source feedback following a parabolic exponent function ( ^2), and 3) JFET with moderate amounts of source feedback following three-halves law.

petemoore

  I too would like to thank RG and Phector for the explanations, detailed/simple or other !
   
Convention creates following, following creates convention.

petemoore

I'm sure that it is just me,
  Then why share it ?
  but frankly, I can make great sense from Yoda's reverse English, but not so much from petemoore.
  I'm sure your Yoda will be overjoyed to find this out !
  Stream of consciousness musings, taken out of an esoteric frame of reference, is a cypher I find myself not willing to spend any time decoding.
  You just spent time on it !
Perhaps I should down a few Pangalactic Gargleblasters first.
  I'm not sure you should get fried just because you read a thread you liked.
     This Earth world is strange indeed....
  You should try stream of consciousness, Yoda's friend !
Convention creates following, following creates convention.

BubbaFet

Quote from: petemoore on June 18, 2010, 07:48:05 AM
I'm sure that it is just me,
  Then why share it ?
  but frankly, I can make great sense from Yoda's reverse English, but not so much from petemoore.
  I'm sure your Yoda will be overjoyed to find this out !
  Stream of consciousness musings, taken out of an esoteric frame of reference, is a cypher I find myself not willing to spend any time decoding.
  You just spent time on it !
Perhaps I should down a few Pangalactic Gargleblasters first.
  I'm not sure you should get fried just because you read a thread you liked.
     This Earth world is strange indeed....
  You should try stream of consciousness, Yoda's friend !
===================
===================
I publicly apologise to petemoore for my posting,
and to the diystompbox community,
for publicly venting a personal frustration and failing,
in an obnoxious manner. Mea culpa.
===================
===================

phector2004

Decided to play with this in the sim... it started acting funky... with a 343 ohm, and the calculated Rd (650 ohm i think) It was giving me the usual 700mV from my 1V 220Hz signal.
Making Rd 6.8k reverse-biased the JFET and caused the program to stop.
Making it 4k boosted the signal to 5V, but it had positive offset (I'm guessing... signal ranged from +3V to -2V). It also "kinked" the waveform so it was getting a steeper down-slope and a more gradual upwards slope.

Increasing Rs to 1k with Rd at 4k gave a 4.5V signal, without the offset or kinkiness
Making Rd 6.8k reintroduces the offset and kinkiness.........

This is starting to look like something that needs an EE degree  :(
Or at least a cheat sheet!

petemoore

  I like 'em...regardless if it took me a 'minute' to figure out, in this particular Jfet circuits case, to small-ize the source resistor...it kept getting smaller faster than the drain...ie conscious stream talk instead of EE understanding of maths etc.
  Doesn't seem to boost as much as a bipolar, and requires a great deal more fiddling with...still worth it.
  I get the feeling even if I did fiddle with it to the point of max output before distortion [as a possible goal], I'd consider what I have right here as good sounding. I can do another stage, and use 12v or 18v as a supply, it was just for a minute [or 500] there that I couldn't visualize a small source resistor there.
Convention creates following, following creates convention.

phector2004

You could also try it with a J201, 2SK30AY, or 2N5457

they all have gains above 1, but the J201 might be overkill at about 5. The other two have gains of about 2. The article even mentions how to figure out Vp, with which you can figure out the gain differences between same types of JFETs

BubbaFet

Hint...When designing with JFETs for distortion, to know Rsource is to 'NO Rsource !'