JFET biasing theory

Started by Dan Moos, August 09, 2011, 12:43:37 AM

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Dan Moos

My main area of knowledge is working with tubes, so that is the angle I'm coming from here.

I want to build a distortion pedal using cascading JFETS. I have been experimenting with three stage designs, and having mixed results. The hits and misses all boil down to the fact that I feel I am mostly just guessing when biasing the JFETS.

While the Fetzer Valve article has been my most valuable source of info, know that I am not neccessarily looking for tube simulation per se, although I might want to when I get this stuff down better.

With a tube biasing is basically accomplished with the cathode (source) resistor. With the JFET, at least as I see here, the source to gate voltage doesn't seem to be the issue, but rather the drain voltage is what is adjusted. I get that voltage headroom is why this is adjusted, but since the JFET seems to be almost a constant current device, I see very little change in the sorce voltage when I mess with the drain trimmer. Thats all well and good, but isn't the quiescent gate voltage more than a little relevant when considering inout sensitivity? Also, with a tube saturation and cutoff distort very differently, and this influences the decision. What about JFETS? In short, I can plug in the formula in the article to get my source resistor, but exactly what is going on here? If only loadlines were practical for JFETs. Or maybe they are? Help!





merlinb

Quote from: Dan Moos on August 09, 2011, 12:43:37 AM
Thats all well and good, but isn't the quiescent gate voltage more than a little relevant when considering inout sensitivity?
JFETs vary a LOT in their Vgs(off) rating. If -1V happens to be centre biased on one FET it might way hot or cold on another, so you can't really use Vgs as a design goal like you can with valves. Instead you have to use drain current as the parameter of interest (or drain voltage, which amounts to the same thing).

Quote
Also, with a tube saturation and cutoff distort very differently, and this influences the decision. What about JFETS? In short, I can plug in the formula in the article to get my source resistor, but exactly what is going on here? If only loadlines were practical for JFETs. Or maybe they are?
You can draw load lines for FETs, although the curves aren't always available, and each FET varies rather a lot of course. I use a curve tracer. But it can give you a rough idea of what effect the drain resistor has.
People like to think that FETs sound a bit like valves, but sadly it's a very poor semblance. Their harmonic distortion is kinda like a valve, but harmonic distortion is only a tiny part of the guitar sound. Most guitar distortion comes from clipping, and FETs clip pretty hard just like any other silicon device.



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fretzburner

I have a question about fet biasing, when biasing fets should i turn on the effect or just in the bypass state?If turned on should the controls set to minimum like volume,gain,etc.or set to maximum?

merlinb

Quote from: fretzburner on January 06, 2012, 11:49:12 PM
I have a question about fet biasing, when biasing fets should i turn on the effect or just in the bypass state?If turned on should the controls set to minimum like volume,gain,etc.or set to maximum?
Umm.... I don't understand your question.

fretzburner

Sorry,what i mean was what is the proper way to bias a fet like adjusting the bias trimmers while the volume and gain controls set to zero or set to 10(without input signal).Like setting the drain voltage to half of the supply voltage as in the dr.boogey project.Because i noticed i get different readings if i vary the controls.

diydave

I while back I've posted a fet bias calculator.
Here's the link: http://www.diydave.be/tools/fetcalc/index_eng.html
Measure Vgs and Idss according to fetzervalve article, punch in the numbers and choose your Source and Drain-resistors.

Gus

try a search for "jfet biasing" in google or bing or...  I just did in google
Lots of information on the web

Rob Strand

The answer to your question is for biasing it shouldn't matter (but it is usually safer, because if various build issues, to do it in the effect mode with a guitar plugged in and turned the guitar volume(s) to zero).  You generally shouldn't see variations is biasing with the control unless the controls specifically affect the bias - check schematic.   For a "normal" circuit if I saw bias change with the controls I would check the schematic, then for electro caps around the wrong way and maybe for wiring errors.  Occasionally some circuits will require set-up with specific settings.


Send:     . .- .-. - .... / - --- / --. --- .-. -
According to the water analogy of electricity, transistor leakage is caused by holes.

petemoore

  Expcet that one Jfet will have bias needs, the next will have very different bias requirements, Jfets...
   Choose the Jfet for Vgsoff, maybe raise [or lower] the supply voltage for biasability or other effect.
  ROG Fetzer and GEO have A-1 info for Jfet applications, there are other sources [no pun intended] too.
Convention creates following, following creates convention.