Sensitivity of noiseless biasing SRPP circuit to choice of JFET and bias ramblin

[murrayatuptown]

Hi:

I want to start working with surface mount devices. No need to warn me about all the headaches that could bring. I'm aware & am actually trading double-sided headaches for tiny micro-vision headaches!

That lunacy aside, I grew frustrated trying to find J201's in surface mount packages without lead times that would make me lose interest in pursuing it!

I have plenty of J201's in TO-92, and also got some 2SK30(ATM?) GR's in TO-92 to experiment with.

I went out on a limb and got some really tiny, low Idss, low VGSoff JFET's made for Electret Condenser Microphone circuits. I'm aware most substitution of JFET's in single-device circuits are surrounded with warnings about sounding quite different.

I like the options offered in an article on noiseless biasing (maybe from the Geofex site?) that starts with mu-amps and modifications to improve the tradeoffs. I am going to explore the SRPP (macro-booster?) variant. I'll probably build up three versions...J201, 2SK30xxxGR and I can't remember the other because I had never seen them before...THS252? Sanyo/ON-Semi I believe...20 V, 350 uA max Idss, VGSoff < 1V, looks like 0.3-0.5 is typical, to compare them. My first use will be with piezos, but I'll probably immediately check 'em out with normal p'ups.

At last, the questions!

1) It seems that the 'improvements' built into the the SRPP with a 1 k resistor between the upper and lower device might make the frustrating variation among devices less of a problem. Is this a reasonable assumption?

2) Some typical ECM circuits are set up for 2V supplies. The SMD parts I got only have data for 2V and a 'reduced gain' scenario where battery voltage might degrade to 1.5 VDC. It's not uncommon for ECM preamp circuits to 'allow' 9V battery or higher phantom voltage operation, with appropriate precautions. I definitely want to use 'standard' 9V batteries for headroom and compatibility (keep it simpler)  with other circuitry in the same box. The SRPP circuit in the article vaguely referred to above has 'midpoint' voltage divider gate bias, so if I keep the drain and or source resistances scaled to be sure Id max cannot be exceeded, I can take care of any JFET 'health' concerns. I don't recall if voltage plays a factor in the gain of such a circuit. Any one have any idea how using a higher drain voltage might affect sound? If it's common with mic preamps, I would think it doesn't affect linearity negatively, at least with small input signal. Maybe with a higher drive from a pickup , the distortion behavior might be in uncharted territory. Anyone have any thoughts about this? I don't know how many other people like to solder under a microscope (!), but maybe my questions, someone else's experience or knowledge and eventually my results, might be beneficial to someone (emphasis on 'one', or maybe two :O)? )

Thanks for reading (and staying awake, if necessary)!

Murray

[amptramp]

Addressing the questions:

1) The resistor between the lower and upper devices should be the reciprocal of the transconductance.  For example, if you have a transconductance of 4000 microsiemens (or micromhos if you are old school), the resistor should be 250 ohms.  This gives equal and opposite current swing with input signal.

2) SRPP is the subject of this article (and read the following month where a correction is made to one of the formulas):

http://www.tubecad.com/may2000/

SRPP uses two active elements to set the current and the load is an integral part of the design because the current that the upper and lower sections select change with signal and the remaining current has to go through the load.  SRPP does not work that well with an infinite load and JFET's make this even more apparent than triodes by being current sources.  Note that your equations will be different from the article above since FET's are operated as high-impedance current sources whereas triodes are low-impedance voltage sources.  Your bias voltage divider and source resistors will set the current.  Gain should not be affected all that much from battery voltage variations and you might be able to fix the bias with a zener so the gain will be fixed (at the cost of changes in headroom with battery voltage) rather than changes in gain for the resistively biased stage.

Maybe you should build a circuit in standard packages before committing to surface mount, just to get everything the way you want before you have to solder under a microscope.

[R.G.]

1) It seems that the 'improvements' built into the the SRPP with a 1 k resistor between the upper and lower device might make the frustrating variation among devices less of a problem. Is this a reasonable assumption?

There's probably some subtle optimization to be done there, but it doesn't do all that much to tame the differences in JFETs.

I use that resistor to force some isolation between the upper JFET source and lower JFET drain to get a much lower output impedance. That lets you have your high gain even in the face of the load being something other than the gate of another FET to buffer it. High gain isn't all that useful if it can't drive a load.

[murrayatuptown]

Thanks A-T and R.G.

I think I need to 'just do it', something, whateve it ends up being, to get started and make changes if needed. Seems like I never finish anything because I keep changing what I want to do.

Part of my original intent was to squeeze some additional circuitry onto an existing circuit board (SynthroTek PT2399 delay), which has a huge amount of  space between parts...too much maybe, realizing how tiny some of the SMT parts are. I also got some SMT 2N7000's and realize they come in two SMT sizes! IIRC, SOT-23 and Maybe -623?...one being about 1/2 the size of the other. The 2399 board is starting to feel too big for an onboard instrument installation.

Some of the small parts are insanely small...too small. I questioned hand placement of 0402's. Apparently those are gargantuan compared to the next couple sizes smaller (would need a dust mask to prevent inhaling them!).

I found my microscope and tweezers (no joke ), but lost the solder station in the basement (TMKS - Too Much Krap Syndrome). Temporary setback in accordance with Murray's Law.