Basics of FET design help request...willing to do the work

[rockhorst]

Every once in a while I try to understand FETs, as a stepping stone to circuit design. Maybe I'm trying to run before I can walk, in the sense that I don't have a working understanding of bipolars, but from what I gather it's more a different kind of walk, and FETs are what's used in most popular circuit designs. Now I've spent the past 3 days reading articles (here, AMZ, Geofex and books) and watching Youtube (this video almost got me going, but not quite).

Although I do have a breadboard that gets used occasionally, I'm more the understand-before-experiment kinda guy. It's usually not the most efficient way to get things done, but just the way I tick. My brain conjures up questions all the time and won't rest until it gets answers. There are great resources available to me on the web, but something just is missing to get the puzzle together. For instance, R.G.'s writing on GEO are without a doubt very good, but it's a bit too woolly for me.

Here's what I propose: we start with a very basic common source JFET amplifier setup, I share what I've found and think I understand and pose very specific questions. That way, maybe we can develop a definite how-to explanation for people that have a basic understanding of circuits (Ohmic resistors, capacitance and such). When the dust has settled, I'll write it up and make it available as a pdf or sticky or whatever. If we get through the depletion mode devices, I suggest to follow up with enhancement MOSFETs.

[note: I have to run an errand now, I'll post my initial findings/questions within a few hours]

[Bill Mountain]

I say get out the breadboard.  It'll never sink in until you try it first hand.  FET biasing has been explained 100 times and it's not going to get any easier.

The quick and dirty method of picking a value for source or drain or using a pot to adjust the other works wonders and can teach you more than you can learn in a tutorial.  Its hard to explain but what I'm trying to say is that real understanding comes from doing.

After experimenting I found a set of components that works well for different JFET's and I just swap them in and out to find ones that match.  After I could make it work consistently (JFET's and I didn't see eye-to-eye for a long time), I realized what questions I still had and I was able to search for and find specific answers.

Good luck!

[rockhorst]

@Bill Mountain:
It's quite possible that just playing around with the breadboard works for lots of people, it does for you. I prefer a little more 'guided' experimentation, always have. In college I sometimes had to do labs that I didn't fully understand from a conceptual viewpoint and it resulted in 'going through the motions' with understanding taking the back seat. In the end, I got it, but the lab had nothing to do with it, and I always found that to be a pity. Most of my fellow students had no such ethical problems (and thus graduated a bit earlier). (I really think and memorize in pictures, very visual in an abstract way).

So I want to try it this way and hopefully it'll work out for me and a few others. Different people learn in different ways (as I'm painfully aware of, being a physics teacher). My thesis was done almost entirely pen on paper (yes that's still possible, even in physics, and it was only 4 years ago!) on quantum computing. It's just the way I work: some guiding experiments, think hard and make some calculations, perfect experiment. I'm at the middle of those three steps right now and just need to get through it.

Anyway, at the risk of overdoing it, I figured that if I want to do other people a service, I shouldn't take my own understanding as a starting point, since that might present a barrier for some to jump on and learn along. I'll write a very short JFET primer tonight (Amsterdam time). The weather is just too damn nice at the moment, so I'm going for a bike ride first

EDIT: it turned out I wrote a Physics of Electricity primer. The JFET primer will follow shortly.

[Pollinator95]

I'd quite like something along these lines too. I've only just started with BJTs, but I want to understand FETs (toob toanz, dawg).

[rockhorst]

Bike rides can be magical. Thinking about what to write and how, I think I sort of get the FET now. We'll see soon enough (starting tomorrow).

This is going to be spread out over a couple of posts (three or four I think). I'm going to start with some very basic remarks on electricity/physics, so that hopefully everyone interested can jump in, whatever their skill level (just some high school physics or an active imagination). Please bear in mind that I'm thinking as a physicist, it's my training and probably quite different from that of an electrical engineer. The two fields are related, but certainly different. Just like chemistry and physics: related, sort of the same thing, but different skill set and heuristics. I'll try to keep the physics to a minimum, not taking the shortest possible route, but quite short and hopefully enjoyable to read. Here it goes:

Electricity: metals, insulators and semiconductors

it's okay to skip this part if you want to, it's mostly background. If you've dealt with basic circuits before, you should be okay

Atoms consist of a nucleus (protons and neutrons) with electrons around it. Normally, the amount of (negatively charged) electrons equals the amount of (positively charged) protons and the atom as a whole is uncharged. The electrons are what we are interested mostly. They are responsible for all of physics/chemistry except stuff like radioactivity. The phenomena we call electricity are due to the accumulation or flow of electrons. We can think of the electrons as filling up shells around the nucleus. Each shell can only hold so many electrons, and when a shell is fully filled, the 'next' electron has to go up a shell. The outer most electrons, in the highest shell, are called valence electrons and are not as tightly bound to the nucleus as the electrons in inner shells. It's generally these valence electrons that do the flowing and chemical bonding. This might seem a bit involved, but you've all seen the pictures (which says more than a thousand words indeed):



That's a schematic representation of Sodium (Na stands for natrium = sodium). The inner shell has 2 electrons, the next shell can hold 8 and then it's full (saturated, to stick with FET lingo). Electrically neutral Sodium however has 11 electrons in total and the 11th electron can't go into the second shell. So it has to go into the next one and it sits there, all alone.

Roughly speaking, the periodic table can be divided into two groups: metals and non-metals (other subdivisions possible of course). A surprising amount of elements fall in the 'metal' category (metal! ). Not many people think of Sodium, Potassium or Lithium as metals, but they are (most people think of their ions and compounds, not the elements). Their outer valence shell isn't fully filled, there's room for more. Also, the electron isn't very tightly bound to the nucleus. That means that it doesn't take a lot of effort for the electron to move away and for another electron to take it's place. That's an electric current! Electrons in a metal can easily hop all over the place, from one atom to the other, what we call conducting electricity. They do this all the time, so much that you really can't pin down the electron to a single atom. All the valence electrons belong to all the atoms in the entire metal.

Not so for an insulator: the outer electron is pinned down in a certain shell. It could hop around too, but that takes a lot more energy than in a metal and won't happen by itself. There just aren't any states easily accessible so the electron has to stay put. This electron does belong to a specific atom. It is possible to kick the electron from the atom. It just takes a lot of energy. How much? Thousands of volts, like lightning in thunderstorms (sending electricity through air, a very good insulator). Most of you have probably seen a Wimshurst machine:


What, then, is a semiconductor? Just what the name suggests: it's inbetween a conductor and an insulator. The outer electrons in elements like Germanium and Silicon are pinned down in their shell, but with just a little kick, they can move around.

Time for another picture:


In a metal, the electrons jitter around randomly and there is no net current. When you apply a voltage difference across a conductor (one side has a higher potential energy than the other), the electrons don't just jitter around, but they also move in a definite direction, giving rise to a net current. Single electrons don't cover a lot of distance (less than a meter an hour!), but when one starts moving , all must move. The bigger the voltage difference, the bigger the net current through the conductor. This happens to be a lineair relationship for metals and stuff we use in circuits (called resistors).

This is known as Ohm's law V = I * R (voltage difference V gives rise to a current I that is proportional to V, with R (resistance) a constant). This law isn't general, but it holds nicely for metals.

A semiconductor can conduct electricity but by itself it does so quite poorly (they have a high resistance to current flow). The conductivity greatly improves by doping them. The pure semiconductor material is 'contaminated' with a small amount of atoms neighboring in the periodic table. In the case of Silicon, you could for instance use Boron or Phosphorus. The resulting material is still electrically neutral. The Silicon sees itself in the presence of atoms with less electrons (Boron) or more electrons (Phosphorus). This greatly lowers the resistance, charge flows more easily. Silicon contaminated with Phosphorus is called N-doped (N for Negative, because Phosphorus has one (negatively charged) electron more than Silicon). In the same fashion, Silicon with Boron is called P-doped (P for Positive, since Aluminum has one electron less, which looks the same as if there was an extra positive charge present, a hole for electrons to drop into).

Doped semiconductors conduct quite nicely, but they only obey Ohm's law for small voltage differences. That is because the supply of free charges is limited compared to charge carriers in a resistor (virtually unlimited). This will be important tomorrow.

NEXT UP (when I wake up): Diodes and JFET construction
AFTER THAT (afternoon hopefully): JFET Amplifier

EDIT: corrected a horrid mistake

[defaced]

Every once in a while I try to understand FETs

Learn how tubes work.  It's alot easier to learn about a voltage controlled device from the standpoint of how tubes work IMO.  The terminology used in semiconductors never made much sense to me, but an electron cloud that gets channeled between two pieces of metal is pretty easy to visualize.

[PRR]

Wimshurst machine?? That's getting down to basics!

If you don't want to repeat 3,000 years of electricity, plagiarize.

A BJT or an FET is a simple device, not enough to amplify. At the very least it needs a load resistor to work against. Usually one or more bias resistors. And coupling caps. (It is possible to use coils but audio coils are far more expensive.)

Infinite range of voltage and polarity are possible. But we want an area where small input power causes larger output power. In BJT this is in one quadrant and a small range of input voltage. In JFET this is in one quadrant and a large range of input voltage. (The JFET actually works in two quadrants because S and D are essentially interchangeable, no difference.)

In both BJT and JFET, the collector-emitter or drain-source voltage hardly matters over a wide range. More than 40V they may break-down. BJT needs ~~1V C-E to work; JFET needs more.

One "breadboard problem" is that the JFET's useful input voltage may be 0.5V to 8V. Working with a 9V battery, some JFETs just won't bias-up usefully with only 9V available, and it may not be clear why.

Audio swings both-ways but simple devices work in one quadrant, one-way.

The trick is we DC bias the device "half-way", wobble the signal either side, and then extract the signal output from the idle DC.

BJTs can pass enough current to die. JFETs mostly won't.

So a simple way to bias a JFET is to go to extremes. Bias it full-on, then full-off, and split the difference.

From observation (plagiarism) we note that we often use a resistor under the source to bias a JFET. Zero ohms should give a high current. Infinite ohms must give zero current. Actually we are not interested in very-very low currents, JFETs leak some, so a very high resistance. Plagiarism (research) shows that 1K is common in happy circuits. Let's use 100K for a very low current.

I used a simulated JFET but I know these results are typical. (Never believe a simulator if you don't have a clue what would be reasonable.) I used 0.001 ohms instead of zero just for consistency.

Full-on we get 12mA current. Full-off we get a small current and 2.8V bias on the JFET.

We want something in the middle. We note that 2.8V/12mA is the same as the JFET acting like a 233 ohm resistor. Let's throw another 233 ohms in there, maybe we will get "half" of the max 12mA.

In fact we get 4.8mA, but that's close enough to "half".



Now we want to load the output so we can extract the signal. We probably want the FET-resistor junction around "half" of the available supply voltage. I had picked 24V supply, we see 1.3V "lost" in the resistor, and we may need a few more volts across the JFET. Let's aim for 10.5V across the resistor, 13.5V across JFET and 233r.

10.5V/4.8mA is 2183 ohms. Put that in the source path.

Although source voltage has dropped from 22.9V to 12.5V, source current hardly drops at all: 4.8mA to 4.76mA. Source-drain voltage hardly matters. (This is true for many small JFETs, all good BJTs, vacuum pentodes, but not vacuum triodes.)

We have a DC bias condition for an apparently workable amplifying stage. The current is arbitrary and somewhat high for battery but we can reduce it by increasing the 233 ohm resistor.

[rockhorst]

Wimshurst machine?? That's getting down to basics!

Awh PRR, come on, it was just an example (and I just think they're cool gizmos). As said, the post was entirely skippable and definitely not intended for you
I hope your willing to check the circuit dissection that's coming up, although you've *basically* told much of the story in your post. I'm just going ahead as planned, need to do this .

[KMG]

For simple understanding of the field-effect transistors (similar to tubes) is enough to imagine a water faucet in the kitchen.
Position of the control knob is the control voltage applied to gate (grid), water flow is the current through transistor (tube).
Difference between types of fets (depletion/enhancement) depends on "zero point" marking on control knob.

[rockhorst]

Part 2a: still skippable, but getting closer. Some important definitions/terms (like depletion region and reverse biasing)

Diodes
If you put an N-doped and P-doped piece of semiconductor together, some electrons from the N-material combine with holes in the P-material and cancel out. This happens in a small region at the junction between the two materials. In that region, no free charges are left to conduct electricity. This region is called the depletion region and it's a barrier for current to flow.



It's possible to cross this barrier by forward biasing the diode. The price you have to pay for silicon semiconductors is typically about 0.6 Volt. You basically push the electrons through the barrier.



If you reverse the battery, the diode gets reverse biased. The depletion region grows and a current will never start to flow (unless the diode breaks down, or if you have a Zener diode). So reverse biasing increases depletion. Take note of the battery polarities. This is what defines a diode: a device that restricts current flow in one direction (vacuum tubes can also function as a diode).

[rockhorst]

Part 2b: JFET construction and operation

The part of a JFET where a current can flow is the channel. It's a single piece of P- or N-doped semiconductor with a terminal at each end, the Drain and the Source. Most effects seem to use N-channel JFETs. Applying a voltage difference V_DS across drain and source, a current I_DS flows from drain to source. For small V_DS the channel behaves linearly like an Ohmic resistor. As V_DS grows, all charge carriers in the channel are involved in the current and it can't increase anymore. Current is then effectively independent of V_DS.



An N-channel JFET is made by putting some P-doped material across the channel. This makes a PN-diode and a depletion region forms. We don't need another diode device, so the PN-junction should never be forward biased. We don't want any current to flow from the channel through the gate. This is the first important rule for a (ideal) JFET:

I_G = 0

So we want to reverse bias the JFET and keep it that way. As the gate becomes more negative with respect to the source (we say that V_GS increases) the depletion region grows and constricts the channel. The maximum current that can flow from drain to source decreases. So the gate can control the current flow from drain to source. You get a whole family of curves for I_DS versus V_DS, each for a different gate bias. At a certain point V_P the channel is pinched off and no current will flow anymore.



Pick a V_GS between 0 and V_P as a bias point, and start at I_DS and V_DS both 0. As you move along the I_DS-V_DS curve (right), you move straight up in the graph on the left through the light blue region. That's the linear part. At the point where you hit the dark blue line, the current in the channel becomes saturated because of interplay between the gate and the drain, the channels width becomes constant, as does the current that can flow through it). Once saturated, you're stuck on the dark blue line (can't go beyond it).

The maximum current that can flow between drain and source with an unbiased gate is called I_{D(rain)S(ource)S(aturation)}.

And here we have:

Question 1
In the graph the transition from the linear to saturation region is defined as V_DS = V_GS - V_P. I've been thinking about why that is. I suspect that has to do with the interplay between drain and gate, that I just referred to. Is that correct? (if so, I'm content with just a confirmation, no need to dig into the physics of that). Or am I missing something else? (it is consistent with PRR's simulation, going from medium to loaded...what was it simulated in by the way?)

[rockhorst]

Okay, so the circuit to study is the same as PRR used in his simulations. His simulations also describe how to basically measure I_DSS and V_p, which is also described in the Fetzer Valve article at Run Off Groove.

Some additional info:
We have I_DS - V_DS curves and a I_DS - V_GS curve (previous post). The I_DS - V_GS curve is approximated nicely by a parabola given by

I_D = I_DSS * (1 - V_GS/V_P)^2

We could combine this with a straight line through the origin given by  I_DS = V_GS/R_S. We choose R_S such that it intersects with the parabola at the I_DS we want to operate at.

That about concludes what I've learned by now and what I'm pretty certain about. It raises a couple of questions and I'll try to tie them in with PRR's sims (which I've reproduced and played around with a bit using Circuitlab). One goal is to reconcile my current understanding of theory with PRR's engineering heuristics. So, my definite list of questions would be:

1. What determines the 'knee' of the saturation region (question from the previous post)? In other words, what's the dashed line (parabola?) in the  I_DS-V_DS graph?

2. For an amplifier we want to be in the saturation region. Why is that? Is it because otherwise we are continuously altering  the bias point and it's very easy to dip into shutting of the JFET?

3. Most design recipes I've seen using curves state 'pick a value for I_DS', but not too low. Even though current won't vary much at a chosen operating point, this seems kind of arbitrary. You state you aim for half of I_DSS, but I would have guessed to aim for V_GS = 1/2 V_P, to allow the signal at the input to maximize it's swing. I've seen this happen in at least one 'tutorial' to define the Q-point. Does that make any sense? Or is the input swing too little to be concerned with this?
In summary: is there an ideal or best choice for the I_DS at DC operating point?

4. Am I correct that with your estimate for R_S by dividing V_P by I_DSS you basically linearize the quadratic equation that I just cited? Or is there some other heuristic behind it?

Edit: additional question
5. Is the biasing of a JFET buffer/follower the same? (my guess is yes).

I think that if I fill those 4 gaps, I have a complete (enough) understanding of a single stage JFET amp and a good starting point for further enquiry.
I hope you can help me out PRR , very very much appreciated.

[PRR]

Designing With Field-Effect Transistors
Siliconix Incorporated, Ed Oxner
(or Amazon.)

ISBN-10: 0070575371

Ten bucks. Get it.

> 1. What determines the 'knee' of the saturation region (question from the previous post)? In other words, what's the dashed line (parabola?) in the  IDS-VDS graph?

What it says. Vgs - Vp

Vgs is the gate-source voltage you are applying to the JFET.

Vp is specific to the JFET, typically 0.5V to 8V, often near 2V-4V.

> 2. For an amplifier we want to be in the saturation region. Why is that?

In "saturation" the output impedance is very high (curves are flat). Voltage gain is not shunted by the device.

Below the knee, FET output impedance is low, shunts away Voltage gain. Also the knee voltage is typically low, a few volts. If you want to use most of your available battery, most of the load line must be in the saturation zone.

(Note that "saturation" has a very different even opposite meaning in BJT talk.)

> 3. Most design recipes I've seen using curves state 'pick a value for IDS', but not too low.

{sigh} This goes to the heart of effective amplifier design.

Not to be rude, but to teach: Wimshurst teaches the device, NOT the _amplifier_. You need a whole nother trail of thought about what an amplifier does, what parts are required.

What device current........

In some ways you want a high device current. Loading hurts less. Leakage is swamped.

In some ways you want a low device current. In JFETs, available un-loaded voltage gain rises as current drops. Battery life or AC power filtering is cheaper. You don't need massive devices.

Rule of thumb from the 1930s. Figure out your actual load!! (Few beginners do this.) Pick a plate (source) resistor 2 to 5 times lower. Pick a tube with plate resistance 2 to 5 times lower. (Plate resistance does not apply to pentodes, BJTs, or FETs, but you must ensure the device will conduct better than the plate resistor.)

> You state you aim for half of IDSS

That gets you a "working" set of values.

It is actually roughly the highest current a given device can be biased at and still give maximum output swing.

> I would have guessed to aim for VGS = 1/2 VP

As I said: when picking Id and Vgs, the Vds (if sufficient) is not very critical. Get a happy current. Then pick (or trim) Rd for your midway idle voltage.

> is there an ideal or best choice for the IDS at DC operating point?

No.

> by dividing VP by IDSS you basically linearize the quadratic

Huh? 4-wheel motocycle? No, in caveman terms, I have a stick, I need two near-equal sticks, I drop my axe near the middle. 12mA max, for class-A audio amplifier we must run less than 6mA idle, two quick numbers give me a resistor for "near half".

More analytically: this maximizes the Power Output for this device and supply voltage. (However resistance-coupled amplifiers are very inefficient, and we rarely bother to compute a Power Output for an R-C amp.)

> 5. Is the biasing of a JFET buffer/follower the same?

Generally you tie Gate to about half supply, and use a source resistor to pull the desired current (less than Idss/2). Self-biased source followers are possible, but then you have to compute a bias resistor.

[PRR]

> basically linearize the quadratic

Bah. If you prize "audio linearity", foo on JFETs. They are not very linear. They do not have large voltage gain. They cost a dime/penny more than good BJTs.

For audio linearity, in the objective sense, use BJTs. Lots of voltage gain. Very consistent. Linearity is an issue, but gain is so fantastic that you can wrap gobs of negative-feedback around a few BJTs and make the result as linear as two resistors.

There are linearity advantages in JFETs. Particularly in radio work with low circuit impedances and where we can use narrowband filters. JFETs have "simple" nonlinearity. In typical radio systems, the distortion products fall far outside the filter bandwidth.

In audio, a simple JFET stage may give tolerable, "simple", and even "euphonious" distortion. BJTs must 'always' be run with NFB. At the same stage-gain, their THD numbers may be as low as a JFET but the distortion products may be more messy.

Use JFETs for what they are good for. Infinite input impedance with excellent speed. That's why there are JFET-Input op-amps. Input gate current is super-small yet drain current can be large enough to drive internal capacitances with authority.

[rockhorst]

Thank PRR! Clear on *most* stuff. Will try to get the book. Funny, I don't understand your 'two small sticks'. Vp and Idss are the two extremes of the JFET, so how I interpret your method is that at half Vp you expect half Idss, which is not so (quite possibly I overinterpret your method and get it all wrong). The procedure works quite nicely though, as you've demonstrated. I'll try to start thinking more of loads as well.

Edit: to be more precise, I understand halving the stick, but not how you got the stick in the first place...And ordered the book...$3.50 and 5x that for shipping lol (non US citizen)...

[PRR]

> I don't understand your 'two small sticks'.  ... at half Vp you expect half Idss, which is not so

We are not splitting atoms, no Quantum Physics, not aiming for the moon.

When I'm in the mud building my garage, need a couple sticks to raise me up a few feet above the mud, "about half of 12 feet" can be 5 feet more or less.

Anyway, while modern lumber comes 144.125 inches, my house's lumber was sawn on site from trees. So, just like JFETs, I got sticks from 7 feet to 17 feet.

Working on a garage, you often need to get off the ground, but not into the roof. Less than length of common lumber. Find a likely stick, whack it near the middle, done.

With all the variations in JFETs, and the varied levels of music, no great precision is needed.

> ...you expect half Idss, which is not so

That _sample_ example just finds a "workable" bias with low mental effort.

Yes, you can work the equations and find a more-exact solution. But the wide spreads of Idss and Vp mean you must re-compute for every JFET you pick up. Mental effort costs more than FETs. The optimum design is _not_ any exact current, but a working amplifier with least effort.

Further.... (I was not done), in audio we almost never want "half Idss". We pick device current to suit circuit impedances and supply voltage, then find a device with minimum Idss at least twice that. Then we figure bias resistor to make all Idss-Vp values tend to come to the desired device current, within tolerable limits.

More realistic example. The classic Fender tube amp circuits tend to about 250K audio load, Fender used lots of 100K DC plate resistors (remember the 2-to-5 ratio rule of thumb). The 250K zone is due to high tube resistance (12AX7 ~~62K). FETs work fine at lower impedances. Pot values come in 1-2.5-5-10 steps. It seems reasonable to change all pots down by a factor of 10. Now we have 25K audio loads. Taking one step further, 10K drain resistor. We obviously won't use 300V supply or 200V plate voltage, 30V supply and 20V drain voltage suggests itself.

So with 10K resistor (defined by circuit harmony) and 10V drop needed, we want the FET run near 1mA. 0.8mA or 1.4mA is not a disaster. And with 2:1 spread of device parameters, we must accept some spread of circuit parameters (perhaps by picking supply higher than a best-case design would need).

After digesting Good Amplifier Principles, the problem becomes: how can you pick a bias resistor so nearly all FETs over 2:1 spread will bias-up at some reasonable current?

[PRR]

> 5x that for shipping lol (non US citizen)...

Seems to be an earlier work by the same guy at Amazon France:

http://www.amazon.fr/Fet-Technology-Application-An-Introduction/dp/0824780507/
Fet Technology and Application: An Introduction [Anglais] [Relié]
Edwin S. Oxner (Auteur)
Prix : EUR 116,32 LIVRAISON GRATUITE En savoir plus.  

I have never seen this over here.

But WOW.... for a hundred-plus smackers (US$144), they better throw in free shipping.

(I guessed France because your avatar (which is not showing BTW) is hosted in France.)

[rockhorst]

We are not splitting atoms, no Quantum Physics, not aiming for the moon.

check

When I'm in the mud building my garage, need a couple sticks to raise me up a few feet above the mud, "about half of 12 feet" can be 5 feet more or less.

Anyway, while modern lumber comes 144.125 inches, my house's lumber was sawn on site from trees. So, just like JFETs, I got sticks from 7 feet to 17 feet.

Working on a garage, you often need to get off the ground, but not into the roof. Less than length of common lumber. Find a likely stick, whack it near the middle, done.

With all the variations in JFETs, and the varied levels of music, no great precision is needed.

check

> ...you expect half Idss, which is not so

That _sample_ example just finds a "workable" bias with low mental effort.

Yes, you can work the equations and find a more-exact solution. But the wide spreads of Idss and Vp mean you must re-compute for every JFET you pick up. Mental effort costs more than FETs. The optimum design is _not_ any exact current, but a working amplifier with least effort.

check

The tube amp and load stuff is going to take some more digesting later today.

By the way: living in the Netherlands (where once Wanadoo provided some internet connections)

[R O Tiree]

Paul,

> 2:1 spread of parameters...

...but, to take the J201 as an example, Vp goes from -0.3 to -1.5V and Idss from 0.2 to 1.0mA which is a 5:1 spread.  That must limit your "half-stick" design point quite badly?

That said, I've noticed that FETs on the same tape/reel tend to have these 2 parameters (easiest to measure?) within fairly tight bands. Same wafer? Not made on a Friday afternoon? Over, say, a year's production, they're going to exhibit a broadly Gaussian distribution, with only a very small percentage out at the extreme limits published in the datasheets and the vast majority pretty near the heart of the envelope, but what do designers do about this? Hamstring their designs or test samples and plug in suitable values of bias components for a particular batch for better performance?  I am mindful, however, of your comment above about "Mental effort costs more than FETs"...

So, a J201 might only be good for a guaranteed performance as an amplifier stage if you either have very small input signals (+/- 75mV or so?) or you actually want it to distort or even clip? As an exercise, I looked at the Tillman Guitar Pre-Amp to try to get a deeper understanding of this... the plots seemed out to lunch, frankly, nowhere near the "half-stick" approximations given above.  Then it dawned on me that this circuit is mis-biased, but totally deliberately!  It's only meant to have a gain of about 1.5 vs a "properly" biased circuit giving a gain of about 6.5 or so (at 9Vdd) and the way it clips is "nice" (it's asymmetric, incidentally), so it's all good, it sez 'ere.  So much for the bread-boarded circuit (I only have a couple of J201s in my parts drawers, both "mid-range").  In simulation, the clipping threshold seems to be still dependent upon the Vp of the particular JFET you stick in there, though... Get one at the top end of the range and you'll be lucky to get any clipping with a soap-bar pickup... get one right at the bottom of the range and a decent single coil will clip for Britain.

Simulation also revealed odd behaviour in a "properly" biased amp stage at the outer limits of the Vp range, feeding it with just a +/-300mV sine-wave at the input... at the low end, there was some visible distortion and the gain had reduced, somewhat - not surprising.  It wasn't clipping, it looked like a hyper-triangle, almost.  At the high end, though, it looked even more like a hyper-triangle waveform and was actually badly attenuated.  Tweaking the Drain resistor made it a bit better.  I've had my fingers burned by sims in the past so, mindful of your comment about not trusting a sim unless you know what's reasonable, does this seem reasonable to you?  I chose to investigate with the J201 because its Vp covers the spread of typical guitar pickup outputs and it's used in a number of circuits around the bazaars, so I was interested to see how Vp affected things.

Even a circuit with 3 resistors, a JFET and a cap or two gets complicated when you (over?) analyse it, but it occurs to me that a heart-of-the-envelope J201 in a Tillman guitar pre-amp (Vp of about -0.8V) might sound very pleasant to a guy with some fairly hot humbuckers, but someone with a single-coil Tele would wonder what all the fuss was about playing through the exact same pedal.  Conversely, one right at the bottom of the range (Vp of -0.3V) might sound the bees knees to the Tele guy whereas the humbucker chap would probably throw it in the bin for being overly compressed and distorted all the time.  Neither of them would be at all impressed with one at Vp of -1.5V... unless they particularly wanted a clean 3dB booster?

I think that what I'm taking away from this little exercise is that, while a lot of circuits can be, indeed must be, all things to all men, there are those that need precise and careful choices if they are to give consistent or predictable results for either your own or a customer's needs.

[PRR]

> take the J201 as an example, Vp goes from -0.3 to -1.5V and Idss from 0.2 to 1.0mA which is a 5:1 spread.  That must limit your "half-stick" design point quite badly?

Read my process. Measure Idss (zero bias current). Meaure Vp (huge bias resistor). Compute Vp/Idss. Find a resistor that big. That will always give you a "working bias".

Possibly not the bias you want, though.

Way-out example: hyper-fat light-diffusion JFET. Idss is 500mA (0.5A), Vp is 0.5V. 0.5V/0.5A= 1 ohm. Put a 1 ohm resistor under this FET, it will bias at something near 200mA, will swing at least twice that and also down to very low current.

We have not yet picked a drain resistor. For 24V supply we might aim at 10V across the drain resistor. 10V/0.2A= 50 ohms.

Obviously this is a poor design if the audio load is 250K and power is costly. Heck, that 10V 0.2A drain resistor must be a more-expensive 5-Watt part, and there's probably a heatsink on the FET.

Small-Audio circuits more often run near 1mA. You can cut-down any Idss>1mA device with a larger bias resistor. If cutting WAY down, the resistor approaches Vp/1mA (or whatever). Yes, we are up against the 2:1 or 5:1 variation of Vp.

OTOH, a mini-FET of Vp=3V Idss=1mA would use a 3K bias resistor, idle near 0.4mA, and at 24V we might use a 25K drain resistor.

> the clipping threshold seems to be still dependent upon the Vp of the particular JFET you stick in

_Without_NFB_, yes, this is true.

Also Voltage Gain tends to a simple function of supply voltage (actually drain resistor voltage) over Vp.

There is another issue in a 9-Volt world. Some FETs have Vp as high as 8V. Even if we end up at 4V bias, that doesn't leave much for drain swing. OTOH the same par number may have Vp=2V. FET biasing gets very variable when supply voltage is not much-larger than Vp spread.

> a decent single coil will clip for Britain

Inerresting expression.

> Tweaking the Drain resistor made it a bit better.

Just like any resistance-coupled amplifier: set the plate (collector, drain) roughly halfway between the supply voltages. You violate this benchmark at your own risk. Sometimes sitting off-center is "good". For MAXimum voltage gain, get the drain down low. For asymmetric clipping a high drain may be useful. But in the beginning, aim for center field.